To gaurantee the update observed by NIC HW, a cio barrier is sufficient,
a io barrier, which translates to dsb on aarch64, is overkill.
Suggested-by: Honnappa Nagarahalli <honnappa.nagaraha...@arm.com>
Signed-off-by: Gavin Hu <gavin...@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagaraha...@arm.com>
---
drivers/net/ena/base/ena_eth_com.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ena/base/ena_eth_com.c
b/drivers/net/ena/base/ena_eth_com.c
index d4d44226d..fce3f69eb 100644
--- a/drivers/net/ena/base/ena_eth_com.c
+++ b/drivers/net/ena/base/ena_eth_com.c
@@ -69,7 +69,7 @@ static int ena_com_write_bounce_buffer_to_dev(struct
ena_com_io_sq *io_sq,
/* Make sure everything was written into the bounce buffer before
* writing the bounce buffer to the device
*/
- wmb();
+ rte_cio_wmb();
/* The line is completed. Copy it to dev */
ENA_MEMCPY_TO_DEVICE_64(io_sq->desc_addr.pbuf_dev_addr + dst_offset,
--
2.17.1
