This patch fixes the marketing name of the QAT GEN3 to P5xxx. Fixes: aa983f03ad2e ("crypto/qat: handle Single Pass Crypto Requests on GEN3") Cc: sta...@dpdk.org
Signed-off-by: Adam Dybkowski <adamx.dybkow...@intel.com> --- doc/guides/rel_notes/release_19_11.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_notes/release_19_11.rst index eb05149f8..0261d2843 100644 --- a/doc/guides/rel_notes/release_19_11.rst +++ b/doc/guides/rel_notes/release_19_11.rst @@ -260,7 +260,7 @@ New Features * **Enabled Single Pass GCM acceleration on QAT GEN3.** Added support for Single Pass GCM, available on QAT GEN3 only (Intel - QuickAssist Technology C4xxx). It is automatically chosen instead of the + QuickAssist Technology P5xxx). It is automatically chosen instead of the classic 2-pass mode when running on QAT GEN3, significantly improving the performance of AES GCM operations. -- 2.17.1