New API to perform I2C write combined operation.

Signed-off-by: Changchun Ouyang <changchun.ouyang at intel.com>
---
 lib/librte_pmd_ixgbe/ixgbe/ixgbe_api.c  | 16 ++++++++++++++++
 lib/librte_pmd_ixgbe/ixgbe/ixgbe_api.h  |  1 +
 lib/librte_pmd_ixgbe/ixgbe/ixgbe_x550.c | 11 +++++++++--
 3 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_api.c 
b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_api.c
index ae13adb..8037301 100644
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_api.c
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_api.c
@@ -1326,6 +1326,7 @@ s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, 
u16 reg, u16 *val)
  *  ixgbe_write_i2c_byte - Writes 8 bit word over I2C
  *  @hw: pointer to hardware structure
  *  @byte_offset: byte offset to write
+ *  @dev_addr: I2C bus address to write to
  *  @data: value to write
  *
  *  Performs byte write operation to SFP module's EEPROM over I2C interface
@@ -1339,6 +1340,21 @@ s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 
byte_offset, u8 dev_addr,
 }

 /**
+ * ixgbe_write_i2c_combined - Perform I2C write combined operation
+ * @hw: pointer to the hardware structure
+ * @addr: I2C bus address to write to
+ * @reg: I2C device register to write to
+ * @val: value to write
+ *
+ * Returns an error code on error.
+ */
+s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
+{
+       return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined, (hw, addr,
+                              reg, val), IXGBE_NOT_IMPLEMENTED);
+}
+
+/**
  *  ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
  *  @hw: pointer to hardware structure
  *  @byte_offset: EEPROM byte offset to write
diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_api.h 
b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_api.h
index 77ebc64..8386e29 100644
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_api.h
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_api.h
@@ -174,6 +174,7 @@ s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 
byte_offset, u8 dev_addr,
 s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
                         u8 data);
+s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 
eeprom_data);
 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_x550.c 
b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_x550.c
index d8a0c19..bdf41da 100644
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_x550.c
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_x550.c
@@ -787,6 +787,7 @@ s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw)
 {
        bool setup_linear;
        u16 reg_slice, edc_mode;
+       s32 ret_val;

        DEBUGFUNC("ixgbe_setup_sfp_modules_X550em");

@@ -827,8 +828,14 @@ s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw)
                edc_mode = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;

        /* Configure CS4227 for connection type. */
-       return hw->phy.ops.write_i2c_combined(hw, IXGBE_CS4227,
-                                             reg_slice, edc_mode);
+       ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
+                                          edc_mode);
+
+       if (ret_val != IXGBE_SUCCESS)
+               ret_val = ixgbe_write_i2c_combined(hw, 0x80, reg_slice,
+                                                  edc_mode);
+
+       return ret_val;
 }

 /**
-- 
1.8.4.2

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