Hi Jerin, > -----Original Message----- > From: Jerin Jacob <jerinjac...@gmail.com> > Sent: Tuesday, November 12, 2019 12:24 PM > To: Gavin Hu (Arm Technology China) <gavin...@arm.com> > Cc: dpdk-dev <dev@dpdk.org>; nd <n...@arm.com>; tho...@monjalon.net; > Honnappa Nagarahalli <honnappa.nagaraha...@arm.com> > Subject: Re: [dpdk-dev] [PATCH v3 2/3] config: add arm neoverse N1 SDP > configuration > > On Mon, Nov 11, 2019 at 11:12 AM Gavin Hu <gavin...@arm.com> wrote: > > > > Arm N1 SDP is an infrastructure segment development platform > > based on armv8.2-a Neoverse N1 CPU. For more information, refer to: > > https://community.arm.com/developer/tools-software/oss-platforms/w/ > > docs/440/neoverse-n1-sdp > > > > Signed-off-by: Gavin Hu <gavin...@arm.com> > > Reviewed-by: Honnappa Nagarahalli <honnappa.nagaraha...@arm.com> > > Reviewed-by: Steve Capper <steve.cap...@arm.com> > > --- > > V3 > > -change the configuration name from "neoversen1" to "n1sdp" to be > platform > > specific other than microarchitecture specific > > -add the missing config/arm/arm64_n1sdp_linux-gcc file for meson build > > --- > > > +[properties] > > +implementor_id = '0x41' > > +implementor_pn = '0xd0c' > > diff --git a/config/arm/meson.build b/config/arm/meson.build > > index 46dff3a..b56e442 100644 > > --- a/config/arm/meson.build > > +++ b/config/arm/meson.build > > @@ -57,6 +57,12 @@ flags_armada = [ > > ['RTE_MAX_LCORE', 16]] > > > > flags_default_extra = [] > > +flags_n1sdp_extra = [ > > + ['RTE_MACHINE', '"n1sdp"'], > > + ['RTE_MAX_NUMA_NODES', 1], > > + ['RTE_MAX_LCORE', 4], > > + ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], > > + ['RTE_LIBRTE_VHOST_NUMA', false]] > > Shouldn't we add ['RTE_CACHE_LINE_SIZE', 64], here? Arm defines it in the upper implemter_id level flags_arm = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_MAX_LCORE', 16], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64]] http://code.dpdk.org/dpdk/latest/source/config/arm/meson.build#L40
> > > flags_thunderx_extra = [
