> -----Original Message-----
> From: Rong, Leyi <leyi.r...@intel.com>
> Sent: Thursday, November 7, 2019 1:22 PM
> To: Lu, Wenzhuo <wenzhuo...@intel.com>; Zhang, Qi Z
> <qi.z.zh...@intel.com>; Ye, Xiaolong <xiaolong...@intel.com>
> Cc: dev@dpdk.org; Rong, Leyi <leyi.r...@intel.com>
> Subject: [PATCH] net/iavf: set CMD bit2 to 1 in Tx Desc of AVX Tx path
>
> Fix iavf vf_checksum_sw case fail in X710/XXV710, set bit2 to 1 of CMD field
> in
> Tx descriptor of AVX Tx path according to Spec.
>
> Fixes: af0c246a3800 ("net/iavf: enable AVX2 for iavf")
>
> Signed-off-by: Leyi Rong <leyi.r...@intel.com>
> ---
> drivers/net/iavf/iavf_rxtx_vec_avx2.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/iavf/iavf_rxtx_vec_avx2.c
> b/drivers/net/iavf/iavf_rxtx_vec_avx2.c
> index f0c00be56..2c7375576 100644
> --- a/drivers/net/iavf/iavf_rxtx_vec_avx2.c
> +++ b/drivers/net/iavf/iavf_rxtx_vec_avx2.c
> @@ -785,8 +785,9 @@ iavf_xmit_fixed_burst_vec_avx2(void *tx_queue,
> struct rte_mbuf **tx_pkts,
> volatile struct iavf_tx_desc *txdp;
> struct iavf_tx_entry *txep;
> uint16_t n, nb_commit, tx_id;
> - uint64_t flags = IAVF_TX_DESC_CMD_EOP;
> - uint64_t rs = IAVF_TX_DESC_CMD_RS | IAVF_TX_DESC_CMD_EOP;
> + /* bit2 is reserved and must be set to 1 according to Spec */
> + uint64_t flags = IAVF_TX_DESC_CMD_EOP | 0x04;
Better to use macro IAVF_TX_DESC_CMD_ICRC to replace 0x4
> + uint64_t rs = IAVF_TX_DESC_CMD_RS | flags;
>
> /* cross rx_thresh boundary is not allowed */
> nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
> --
> 2.17.1
