Hi, Guinan

[snip]

On 10/30, Sun GuinanX wrote:
>+
>+void
>+ixgbe_dev_macsec_register_set(struct rte_eth_dev *dev,

I'd prefer to keep ixgbe_dev_macsec_register_enable since when it comes to 
HW register, `enable` is more accurate then `set` for this routine.  
And same for the below function, prefer to use disable, not reset.

Thanks,
Xiaolong

>+                              struct ixgbe_macsec_setting *macsec_contrl)
>+{
>+      struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
>+      uint32_t ctrl;
>+      uint8_t en = (uint8_t)macsec_contrl->encrypt_en;
>+      uint8_t rp = (uint8_t)macsec_contrl->replayprotect_en;
>+
>+      /**
>+       * Workaround:
>+       * As no ixgbe_disable_sec_rx_path equivalent is
>+       * implemented for tx in the base code, and we are
>+       * not allowed to modify the base code in DPDK, so
>+       * just call the hand-written one directly for now.
>+       * The hardware support has been checked by
>+       * ixgbe_disable_sec_rx_path().
>+       */
>+      ixgbe_disable_sec_tx_path_generic(hw);
>+
>+      /* Enable Ethernet CRC (required by MACsec offload) */
>+      ctrl = IXGBE_READ_REG(hw, IXGBE_HLREG0);
>+      ctrl |= IXGBE_HLREG0_TXCRCEN | IXGBE_HLREG0_RXCRCSTRP;
>+      IXGBE_WRITE_REG(hw, IXGBE_HLREG0, ctrl);
>+
>+      /* Enable the TX and RX crypto engines */
>+      ctrl = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL);
>+      ctrl &= ~IXGBE_SECTXCTRL_SECTX_DIS;
>+      IXGBE_WRITE_REG(hw, IXGBE_SECTXCTRL, ctrl);
>+
>+      ctrl = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);
>+      ctrl &= ~IXGBE_SECRXCTRL_SECRX_DIS;
>+      IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, ctrl);
>+
>+      ctrl = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
>+      ctrl &= ~IXGBE_SECTX_MINSECIFG_MASK;
>+      ctrl |= 0x3;
>+      IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, ctrl);
>+
>+      /* Enable SA lookup */
>+      ctrl = IXGBE_READ_REG(hw, IXGBE_LSECTXCTRL);
>+      ctrl &= ~IXGBE_LSECTXCTRL_EN_MASK;
>+      ctrl |= en ? IXGBE_LSECTXCTRL_AUTH_ENCRYPT :
>+                   IXGBE_LSECTXCTRL_AUTH;
>+      ctrl |= IXGBE_LSECTXCTRL_AISCI;
>+      ctrl &= ~IXGBE_LSECTXCTRL_PNTHRSH_MASK;
>+      ctrl |= IXGBE_MACSEC_PNTHRSH & IXGBE_LSECTXCTRL_PNTHRSH_MASK;
>+      IXGBE_WRITE_REG(hw, IXGBE_LSECTXCTRL, ctrl);
>+
>+      ctrl = IXGBE_READ_REG(hw, IXGBE_LSECRXCTRL);
>+      ctrl &= ~IXGBE_LSECRXCTRL_EN_MASK;
>+      ctrl |= IXGBE_LSECRXCTRL_STRICT << IXGBE_LSECRXCTRL_EN_SHIFT;
>+      ctrl &= ~IXGBE_LSECRXCTRL_PLSH;
>+      if (rp)
>+              ctrl |= IXGBE_LSECRXCTRL_RP;
>+      else
>+              ctrl &= ~IXGBE_LSECRXCTRL_RP;
>+      IXGBE_WRITE_REG(hw, IXGBE_LSECRXCTRL, ctrl);
>+
>+      /* Start the data paths */
>+      ixgbe_enable_sec_rx_path(hw);
>+      /**
>+       * Workaround:
>+       * As no ixgbe_enable_sec_rx_path equivalent is
>+       * implemented for tx in the base code, and we are
>+       * not allowed to modify the base code in DPDK, so
>+       * just call the hand-written one directly for now.
>+       */
>+      ixgbe_enable_sec_tx_path_generic(hw);
>+}
>+
>+void
>+ixgbe_dev_macsec_register_reset(struct rte_eth_dev *dev)
>+{
>+      struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
>+      uint32_t ctrl;
>+
>+      /**
>+       * Workaround:
>+       * As no ixgbe_disable_sec_rx_path equivalent is
>+       * implemented for tx in the base code, and we are
>+       * not allowed to modify the base code in DPDK, so
>+       * just call the hand-written one directly for now.
>+       * The hardware support has been checked by
>+       * ixgbe_disable_sec_rx_path().
>+       */
>+      ixgbe_disable_sec_tx_path_generic(hw);
>+
>+      /* Disable the TX and RX crypto engines */
>+      ctrl = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL);
>+      ctrl |= IXGBE_SECTXCTRL_SECTX_DIS;
>+      IXGBE_WRITE_REG(hw, IXGBE_SECTXCTRL, ctrl);
>+
>+      ctrl = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);
>+      ctrl |= IXGBE_SECRXCTRL_SECRX_DIS;
>+      IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, ctrl);
>+
>+      /* Disable SA lookup */
>+      ctrl = IXGBE_READ_REG(hw, IXGBE_LSECTXCTRL);
>+      ctrl &= ~IXGBE_LSECTXCTRL_EN_MASK;
>+      ctrl |= IXGBE_LSECTXCTRL_DISABLE;
>+      IXGBE_WRITE_REG(hw, IXGBE_LSECTXCTRL, ctrl);
>+
>+      ctrl = IXGBE_READ_REG(hw, IXGBE_LSECRXCTRL);
>+      ctrl &= ~IXGBE_LSECRXCTRL_EN_MASK;
>+      ctrl |= IXGBE_LSECRXCTRL_DISABLE << IXGBE_LSECRXCTRL_EN_SHIFT;
>+      IXGBE_WRITE_REG(hw, IXGBE_LSECRXCTRL, ctrl);
>+
>+      /* Start the data paths */
>+      ixgbe_enable_sec_rx_path(hw);
>+      /**
>+       * Workaround:
>+       * As no ixgbe_enable_sec_rx_path equivalent is
>+       * implemented for tx in the base code, and we are
>+       * not allowed to modify the base code in DPDK, so
>+       * just call the hand-written one directly for now.
>+       */
>+      ixgbe_enable_sec_tx_path_generic(hw);
>+}

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