On 10/08, alvinx.zh...@intel.com wrote:
>From: Alvin Zhang <alvinx.zh...@intel.com>
>
>If support-multi-driver is enabled, the global registers should not
>be configured. But with the current code base, if creating a flow
>with rte_flow API, the global register GLQF_FD_MSK may be changed.
>
>Fixes: cfdfca493cae ("net/i40e: fix multiple driver support")
>Cc: sta...@dpdk.org
>
>Signed-off-by: root <alvinx.zh...@intel.com>
The signature should be Alvin Zhang <alvinx.zh...@intel.com>, fixed it while
merging.
>--
>
>v3: modify codes according to the comments.
>v2: modify codes according to the comments.
Better to be specific about the changes you made for each version.
>---
> drivers/net/i40e/i40e_flow.c | 38 +++++++++++++++++++++++++++++++-------
> 1 file changed, 31 insertions(+), 7 deletions(-)
>
>diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
>index e902a35..f9c3183 100644
>--- a/drivers/net/i40e/i40e_flow.c
>+++ b/drivers/net/i40e/i40e_flow.c
>@@ -2349,6 +2349,37 @@ static int i40e_flow_destroy_tunnel_filter(struct
>i40e_pf *pf,
> if (num < 0)
> return -EINVAL;
>
>+ if (pf->support_multi_driver) {
>+ for (i = 0; i < num; i++)
>+ if (i40e_read_rx_ctl(hw,
>+ I40E_GLQF_FD_MSK(i, pctype)) !=
>+ mask_reg[i]) {
>+ PMD_DRV_LOG(ERR, "Input set setting is not"
>+ " supported with"
>+ " `support-multi-driver`"
>+ " enabled!");
>+ return -EPERM;
>+ }
>+ for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
>+ if (i40e_read_rx_ctl(hw,
>+ I40E_GLQF_FD_MSK(i, pctype)) != 0) {
>+ PMD_DRV_LOG(ERR, "Input set setting is not"
>+ " supported with"
>+ " `support-multi-driver`"
>+ " enabled!");
>+ return -EPERM;
>+ }
>+
>+ } else {
>+ for (i = 0; i < num; i++)
>+ i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype),
>+ mask_reg[i]);
>+ /*clear unused mask registers of the pctype */
>+ for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
>+ i40e_check_write_reg(hw,
>+ I40E_GLQF_FD_MSK(i, pctype), 0);
>+ }
>+
> inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set);
>
> i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0),
>@@ -2357,13 +2388,6 @@ static int i40e_flow_destroy_tunnel_filter(struct
>i40e_pf *pf,
> (uint32_t)((inset_reg >>
> I40E_32_BIT_WIDTH) & UINT32_MAX));
>
>- for (i = 0; i < num; i++)
>- i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype),
>- mask_reg[i]);
>-
>- /*clear unused mask registers of the pctype */
>- for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
>- i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0);
> I40E_WRITE_FLUSH(hw);
>
> pf->fdir.input_set[pctype] = input_set;
>--
>1.8.3.1
>
Reviewed-by: Xiaolong Ye <xiaolong...@intel.com>
Applied to dpdk-next-net-intel. Thanks.
