On Fri, Oct 18, 2019 at 4:25 PM Jerin Jacob <jerinjac...@gmail.com> wrote:
>
> On Fri, Oct 18, 2019 at 7:46 PM David Marchand
> <david.march...@redhat.com> wrote:
> >
> > On Fri, Oct 18, 2019 at 1:22 PM Phil Yang <phil.y...@arm.com> wrote:
> > >
> > > This patch adds the implementation of the 128-bit atomic compare
> > > exchange API on AArch64. Using 64-bit 'ldxp/stxp' instructions
> > > can perform this operation. Moreover, on the LSE atomic extension
> > > accelerated platforms, it implemented by 'casp' instructions for
> > > better performance.
> > >
> > > Since the '__ARM_FEATURE_ATOMICS' flag only supports GCC-9, so this
> > > patch adds a new config flag 'RTE_ARM_FEATURE_ATOMICS' to enable the
> > > 'cas' version on elder version compilers.
> >
> > Jerin, Phil,
> >
> > I am getting a build error on the octeontx2 target:
> >
> > {standard input}: Assembler messages:
> > {standard input}:672: Error: selected processor does not support `casp
> > x0,x1,x2,x3,[x4]'
> > {standard input}:690: Error: selected processor does not support
> > `caspa x0,x1,x2,x3,[x4]'
> > {standard input}:708: Error: selected processor does not support
> > `caspl x0,x1,x2,x3,[x4]'
> > {standard input}:726: Error: selected processor does not support
> > `caspal x0,x1,x2,x3,[x4]'
> > ninja: build stopped: subcommand failed.
> >
> > Looking into the meson logs, I can see:
> >
> > Native C compiler: ccache gcc (gcc 9.2.1 "gcc (GCC) 9.2.1 20190827
> > (Red Hat 9.2.1-1)")
> > Cross C compiler: aarch64-linux-gnu-gcc (gcc 8.2.1)
> > Host machine cpu family: aarch64
> > Host machine cpu: armv8-a
> > Target machine cpu family: aarch64
> > Target machine cpu: armv8-a
> > Build machine cpu family: x86_64
> > Build machine cpu: x86_64
> > ...
> > Message: Implementer : Cavium
> > Compiler for C supports arguments -mcpu=octeontx2: NO
>
> The compiler needs either +lse or mcpu=octeontx2 to generate casp instruction.
> Could you try this patch, I can submit a patch if it works for you.Ah cool, I was looking at the march stuff. Tried your patch, it works fine. I'd say we can squash your bits in the current patch, since this was unneeded before this patch. Is this okay for you? > > [master][dpdk-next-net-mrvl] $ git diff > diff --git a/config/arm/meson.build b/config/arm/meson.build > index 979018e16..466522786 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -96,7 +96,7 @@ machine_args_cavium = [ > ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], > ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra], > ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], > flags_thunderx2_extra], > - ['0xb2', ['-mcpu=octeontx2'], flags_octeontx2_extra]] > + ['0xb2', > ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], > flags_octeontx2_extra]] > > ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) > impl_generic = ['Generic armv8', flags_generic, machine_args_generic] Thanks for the quick reply. -- David Marchand
