[dpdk-dev] [PATCH v2 08/12] net/bnxt: change msix vector to queue mapping

[Ajit Khaparde]

From: Rahul Gupta <rahul.gu...@broadcom.com>

DPDK PCIe-VFIO framework configures base MSIX vector for interrupts
which is supported by other h/w. In case of bnxt, base MSIX vector
starts with the RX completion queue 0. To comply with the DPDK
framework We need to increase the map index by 1 so that RXTX
completion queues events can be delivered to appropriate event listeners
by kernel VFIO.

Fixes: bd0a14c99f65 ("net/bnxt: use dedicated CPR for async events")
Cc: sta...@dpdk.org
Signed-off-by: Rahul Gupta <rahul.gu...@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khapa...@broadcom.com>
---
 drivers/net/bnxt/bnxt.h      | 3 +++
 drivers/net/bnxt/bnxt_irq.h  | 3 ---
 drivers/net/bnxt/bnxt_ring.c | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index 5020cd3415..080365804c 100644
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -58,6 +58,9 @@
 #define BNXT_NUM_ASYNC_CPR(bp) 1
 #endif
 
+#define BNXT_MISC_VEC_ID               RTE_INTR_VEC_ZERO_OFFSET
+#define BNXT_RX_VEC_START              RTE_INTR_VEC_RXTX_OFFSET
+
 /* Chimp Communication Channel */
 #define GRCPF_REG_CHIMP_CHANNEL_OFFSET         0x0
 #define GRCPF_REG_CHIMP_COMM_TRIGGER           0x100
diff --git a/drivers/net/bnxt/bnxt_irq.h b/drivers/net/bnxt/bnxt_irq.h
index 1b56e08068..ad8a1df9ca 100644
--- a/drivers/net/bnxt/bnxt_irq.h
+++ b/drivers/net/bnxt/bnxt_irq.h
@@ -6,9 +6,6 @@
 #ifndef _BNXT_IRQ_H_
 #define _BNXT_IRQ_H_
 
-#define BNXT_MISC_VEC_ID               RTE_INTR_VEC_ZERO_OFFSET
-#define BNXT_RX_VEC_START              RTE_INTR_VEC_RXTX_OFFSET
-
 struct bnxt_irq {
        rte_intr_callback_fn    handler;
        unsigned int            vector;
diff --git a/drivers/net/bnxt/bnxt_ring.c b/drivers/net/bnxt/bnxt_ring.c
index 886029c575..19af727635 100644
--- a/drivers/net/bnxt/bnxt_ring.c
+++ b/drivers/net/bnxt/bnxt_ring.c
@@ -406,7 +406,7 @@ static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int 
queue_index,
 {
        struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
        uint32_t nq_ring_id = HWRM_NA_SIGNATURE;
-       int cp_ring_index = queue_index + BNXT_NUM_ASYNC_CPR(bp);
+       int cp_ring_index = queue_index + BNXT_RX_VEC_START;
        struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
        uint8_t ring_type;
        int rc = 0;
-- 
2.20.1 (Apple Git-117)