Hi Jerin,
> -----Original Message-----
> From: Jerin Jacob <jerinjac...@gmail.com>
> Sent: Friday, September 13, 2019 12:12 AM
> To: Gavin Hu (Arm Technology China) <gavin...@arm.com>
> Cc: dev@dpdk.org; nd <n...@arm.com>; tho...@monjalon.net;
> step...@networkplumber.org; hemant.agra...@nxp.com;
> jer...@marvell.com; Pavan Nikhilesh <pbhagavat...@marvell.com>;
> Honnappa Nagarahalli <honnappa.nagaraha...@arm.com>
> Subject: Re: [dpdk-dev] [PATCH v5 3/8] eal: add the APIs to wait until equal
>
> On Thu, Sep 12, 2019 at 4:56 PM Gavin Hu <gavin...@arm.com> wrote:
> >
> > The rte_wait_until_equalxx APIs abstract the functionality of 'polling
> > for a memory location to become equal to a given value'.
> >
> > Signed-off-by: Gavin Hu <gavin...@arm.com>
> > Reviewed-by: Ruifeng Wang <ruifeng.w...@arm.com>
> > Reviewed-by: Steve Capper <steve.cap...@arm.com>
> > Reviewed-by: Ola Liljedahl <ola.liljed...@arm.com>
> > Reviewed-by: Honnappa Nagarahalli <honnappa.nagaraha...@arm.com>
> > Reviewed-by: Phil Yang <phil.y...@arm.com>
> > Acked-by: Pavan Nikhilesh <pbhagavat...@marvell.com>
> > ---
> > .../common/include/arch/arm/rte_pause_64.h | 30 +++++++
> > lib/librte_eal/common/include/generic/rte_pause.h | 98
> +++++++++++++++++++++-
> > 2 files changed, 127 insertions(+), 1 deletion(-)
> >
> > diff --git a/lib/librte_eal/common/include/arch/arm/rte_pause_64.h
> b/lib/librte_eal/common/include/arch/arm/rte_pause_64.h
> > index 93895d3..dabde17 100644
> > --- a/lib/librte_eal/common/include/arch/arm/rte_pause_64.h
> > +++ b/lib/librte_eal/common/include/arch/arm/rte_pause_64.h
> > @@ -1,5 +1,6 @@
> > /* SPDX-License-Identifier: BSD-3-Clause
> > * Copyright(c) 2017 Cavium, Inc
> > + * Copyright(c) 2019 Arm Limited
> > */
> >
> > #ifndef _RTE_PAUSE_ARM64_H_
> > @@ -17,6 +18,35 @@ static inline void rte_pause(void)
> > asm volatile("yield" ::: "memory");
> > }
> >
> > +#ifdef RTE_ARM_USE_WFE
> > +#define __WAIT_UNTIL_EQUAL(name, asm_op, wide, type) \
> > +static __rte_always_inline void \
> > +rte_wait_until_equal_##name(volatile type * addr, type expected) \
> > +{ \
> > + type tmp; \
> > + asm volatile( \
> > + #asm_op " %" #wide "[tmp], %[addr]\n" \
> > + "cmp %" #wide "[tmp], %" #wide "[expected]\n" \
> > + "b.eq 2f\n" \
> > + "sevl\n" \
> > + "1: wfe\n" \
> > + #asm_op " %" #wide "[tmp], %[addr]\n" \
> > + "cmp %" #wide "[tmp], %" #wide "[expected]\n" \
> > + "bne 1b\n" \
> > + "2:\n" \
> > + : [tmp] "=&r" (tmp) \
> > + : [addr] "Q"(*addr), [expected] "r"(expected) \
> > + : "cc", "memory"); \
> > +}
> > +/* Wait for *addr to be updated with expected value */
> > +__WAIT_UNTIL_EQUAL(relaxed_16, ldxrh, w, uint16_t)
> > +__WAIT_UNTIL_EQUAL(acquire_16, ldaxrh, w, uint16_t)
> > +__WAIT_UNTIL_EQUAL(relaxed_32, ldxr, w, uint32_t)
> > +__WAIT_UNTIL_EQUAL(acquire_32, ldaxr, w, uint32_t)
> > +__WAIT_UNTIL_EQUAL(relaxed_64, ldxr, x, uint64_t)
> > +__WAIT_UNTIL_EQUAL(acquire_64, ldaxr, x, uint64_t)
> > +#endif
>
> Looks good.
>
> > +
> > #ifdef __cplusplus
> > }
> > #endif
> > diff --git a/lib/librte_eal/common/include/generic/rte_pause.h
> b/lib/librte_eal/common/include/generic/rte_pause.h
> > index 52bd4db..dfa6a53 100644
> > --- a/lib/librte_eal/common/include/generic/rte_pause.h
> > +++ b/lib/librte_eal/common/include/generic/rte_pause.h
> > @@ -1,10 +1,10 @@
> > /* SPDX-License-Identifier: BSD-3-Clause
> > * Copyright(c) 2017 Cavium, Inc
> > + * Copyright(c) 2019 Arm Limited
> > */
> >
> > #ifndef _RTE_PAUSE_H_
> > #define _RTE_PAUSE_H_
> > -
>
> Unwanted change.
Will fix it.
>
> > /**
> > * @file
> > *
> > @@ -12,6 +12,10 @@
> > *
> > */
> >
> > +#include <stdint.h>
> > +#include <rte_common.h>
> > +#include <rte_atomic.h>
> > +
> > /**
> > * Pause CPU execution for a short while
> > *
> > @@ -20,4 +24,96 @@
> > */
> > static inline void rte_pause(void);
> >
> > +/**
> > + * Wait for *addr to be updated with expected value
>
> IMO, We need to mention relaxed attribute also in the comment.
Will fix it.
>
> > + *
> > + * @param addr
> > + * A pointer to the memory location.
> > + * @param expected
> > + * An expected value to be in the memory location.
> > + */
> > +__rte_always_inline
> > +static void
> > +rte_wait_until_equal_relaxed_16(volatile uint16_t *addr, uint16_t
> expected);
>
> > +
> > +/**
> > + * Wait for *addr to be updated with expected value
> > + *
> > + * @param addr
> > + * A pointer to the memory location.
> > + * @param expected
> > + * An expected value to be in the memory location.
> > + */
> > +__rte_always_inline
> > +static void
> > +rte_wait_until_equal_acquire_64(volatile uint64_t *addr, uint64_t
> expected);
> > +
> > +#if !defined(RTE_ARM_USE_WFE)
>
> Looks like there is a side effect as meson's build/rte_build_config.h
> comes as below
> #define RTE_ARM_USE_WFE 0
>
> So actually it is defined.
Good catch, thanks, will fix it.
>
> > +#define __WAIT_UNTIL_EQUAL(op_name, size, type, memorder) \
> > +__rte_always_inline \
> > +static void \
> > +rte_wait_until_equal_##op_name##_##size(volatile type *addr, \
> > + type expected) \
> > +{ \
> > + while (__atomic_load_n(addr, memorder) != expected) \
> > + rte_pause(); \
> > +}
> > +
> > +/* Wait for *addr to be updated with expected value */
> > +__WAIT_UNTIL_EQUAL(relaxed, 16, uint16_t, __ATOMIC_RELAXED)
> > +__WAIT_UNTIL_EQUAL(acquire, 16, uint16_t, __ATOMIC_ACQUIRE)
> > +__WAIT_UNTIL_EQUAL(relaxed, 32, uint32_t, __ATOMIC_RELAXED)
> > +__WAIT_UNTIL_EQUAL(acquire, 32, uint32_t, __ATOMIC_ACQUIRE)
> > +__WAIT_UNTIL_EQUAL(relaxed, 64, uint64_t, __ATOMIC_RELAXED)
> > +__WAIT_UNTIL_EQUAL(acquire, 64, uint64_t, __ATOMIC_ACQUIRE)
> > +#endif /* RTE_ARM_USE_WFE */
> > +
> > #endif /* _RTE_PAUSE_H_ */
> > --
> > 2.7.4
> >
