From: Kalesh AP <kalesh-anakkur.pura...@broadcom.com>

HWRM_ERROR_RECOVERY_QCFG command returns the FW status registers offset
for periodic firmware health check monitoring. Map them to GRC window 2.

Signed-off-by: Kalesh AP <kalesh-anakkur.pura...@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.ko...@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khapa...@broadcom.com>
---
 drivers/net/bnxt/bnxt.h        | 22 ++++++++++++++++-
 drivers/net/bnxt/bnxt_ethdev.c | 44 ++++++++++++++++++++++++++++++++++
 drivers/net/bnxt/bnxt_hwrm.c   |  4 ++++
 3 files changed, 69 insertions(+), 1 deletion(-)

diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index 19bd13a7f..1da09569d 100644
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -354,7 +354,9 @@ struct bnxt_error_recovery_info {
 #define BNXT_FW_HEARTBEAT_CNT_REG      1
 #define BNXT_FW_RECOVERY_CNT_REG       2
 #define BNXT_FW_RESET_INPROG_REG       3
-       uint32_t        status_regs[4];
+#define BNXT_FW_STATUS_REG_CNT         4
+       uint32_t        status_regs[BNXT_FW_STATUS_REG_CNT];
+       uint32_t        mapped_status_regs[BNXT_FW_STATUS_REG_CNT];
        uint32_t        reset_inprogress_reg_mask;
 #define BNXT_NUM_RESET_REG     16
        uint8_t         reg_array_cnt;
@@ -366,6 +368,22 @@ struct bnxt_error_recovery_info {
        uint32_t        flags;
 };
 
+/* address space location of register */
+#define BNXT_FW_STATUS_REG_TYPE_MASK   3
+/* register is located in PCIe config space */
+#define BNXT_FW_STATUS_REG_TYPE_CFG    0
+/* register is located in GRC address space */
+#define BNXT_FW_STATUS_REG_TYPE_GRC    1
+/* register is located in BAR0  */
+#define BNXT_FW_STATUS_REG_TYPE_BAR0   2
+/* register is located in BAR1  */
+#define BNXT_FW_STATUS_REG_TYPE_BAR1   3
+
+#define BNXT_FW_STATUS_REG_TYPE(reg)   ((reg) & BNXT_FW_STATUS_REG_TYPE_MASK)
+#define BNXT_FW_STATUS_REG_OFF(reg)    ((reg) & ~BNXT_FW_STATUS_REG_TYPE_MASK)
+
+#define BNXT_GRCP_WINDOW_2_BASE                0x2000
+
 #define BNXT_HWRM_SHORT_REQ_LEN                sizeof(struct hwrm_short_input)
 struct bnxt {
        void                            *bar0;
@@ -510,6 +528,8 @@ int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int 
wait_to_complete);
 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg);
 int is_bnxt_in_error(struct bnxt *bp);
 
+int bnxt_map_fw_health_status_regs(struct bnxt *bp);
+
 bool is_bnxt_supported(struct rte_eth_dev *dev);
 bool bnxt_stratus_device(struct bnxt *bp);
 extern const struct rte_flow_ops bnxt_flow_ops;
diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index 18046c00a..52c460d2c 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -3496,6 +3496,49 @@ static const struct eth_dev_ops bnxt_dev_ops = {
        .timesync_read_tx_timestamp = bnxt_timesync_read_tx_timestamp,
 };
 
+int bnxt_map_fw_health_status_regs(struct bnxt *bp)
+{
+       struct bnxt_error_recovery_info *info = bp->recovery_info;
+       uint32_t reg_base = 0xffffffff;
+       int i;
+
+       /* Only pre-map the monitoring GRC registers using window 2 */
+       for (i = 0; i < BNXT_FW_STATUS_REG_CNT; i++) {
+               uint32_t reg = info->status_regs[i];
+
+               if (BNXT_FW_STATUS_REG_TYPE(reg) != BNXT_FW_STATUS_REG_TYPE_GRC)
+                       continue;
+
+               if (reg_base == 0xffffffff)
+                       reg_base = reg & 0xfffff000;
+               if ((reg & 0xfffff000) != reg_base)
+                       return -ERANGE;
+
+               /* Use mask 0xffc as the Lower 2 bits indicates
+                * address space location
+                */
+               info->mapped_status_regs[i] = BNXT_GRCP_WINDOW_2_BASE +
+                                               (reg & 0xffc);
+       }
+
+       if (reg_base == 0xffffffff)
+               return 0;
+
+       rte_write32(reg_base, (uint8_t *)bp->bar0 +
+                   BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4);
+
+       return 0;
+}
+
+static void bnxt_unmap_fw_health_status_regs(struct bnxt *bp)
+{
+       if (!(bp->flags & BNXT_FLAG_FW_CAP_ERROR_RECOVERY))
+               return;
+
+       rte_write32(0, (uint8_t *)bp->bar0 +
+                   BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4);
+}
+
 static void bnxt_dev_cleanup(struct bnxt *bp)
 {
        bnxt_set_hwrm_link_config(bp, false);
@@ -4227,6 +4270,7 @@ bnxt_uninit_resources(struct bnxt *bp, bool reconfig_dev)
        bnxt_free_int(bp);
        bnxt_free_mem(bp, reconfig_dev);
        bnxt_hwrm_func_buf_unrgtr(bp);
+       bnxt_unmap_fw_health_status_regs(bp);
        rc = bnxt_hwrm_func_driver_unregister(bp, 0);
        bp->flags &= ~BNXT_FLAG_REGISTERED;
        bnxt_free_ctx_mem(bp);
diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index e2c993936..2d9c43c98 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -4767,6 +4767,10 @@ int bnxt_hwrm_error_recovery_qcfg(struct bnxt *bp)
 err:
        HWRM_UNLOCK();
 
+       /* Map the FW status registers */
+       if (!rc)
+               rc = bnxt_map_fw_health_status_regs(bp);
+
        if (rc) {
                rte_free(bp->recovery_info);
                bp->recovery_info = NULL;
-- 
2.20.1 (Apple Git-117)

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