> -----Original Message-----
> From: Zhang, Tianfei
> Sent: Friday, June 21, 2019 16:40
> To: dev@dpdk.org; Yigit, Ferruh <ferruh.yi...@intel.com>
> Cc: Xu, Rosen <rosen...@intel.com>; sta...@dpdk.org; Zhang, Tianfei
> <tianfei.zh...@intel.com>
> Subject: [PATCH v4 3/5] raw/ifpga_rawdev/base: fix bit fields definition
>
> Fix CTRL_DEV_SELECT bit fields definition about eth_group devices.
>
> Fixes: 8a256bef32 ("raw/ifpga/base: add eth group driver")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Tianfei zhang <tianfei.zh...@intel.com>
> Acked-by: Rosen Xu <rosen...@intel.com>
> ---
> drivers/raw/ifpga_rawdev/base/opae_eth_group.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/raw/ifpga_rawdev/base/opae_eth_group.h
> b/drivers/raw/ifpga_rawdev/base/opae_eth_group.h
> index 8d695cc8e..a66d77e27 100644
> --- a/drivers/raw/ifpga_rawdev/base/opae_eth_group.h
> +++ b/drivers/raw/ifpga_rawdev/base/opae_eth_group.h
> @@ -31,7 +31,7 @@
> #define CMD_NOP 0ULL
> #define CMD_RD 1ULL
> #define CMD_WR 2ULL
> -#define CTRL_DEV_SELECT GENMASK_ULL(52, 49)
> +#define CTRL_DEV_SELECT GENMASK_ULL(53, 49)
> #define CTRL_DS_SHIFT 49
> #define CTRL_FEAT_SELECT BIT_ULL(48)
> #define SELECT_IP 0
> --
> 2.17.1
Acked-by: Rosen Xu <rosen...@intel.com>
