From: Pavan Nikhilesh <pbhagavat...@marvell.com>
Add the make and meson based build infrastructure along with the
eventdev(SSO) device probe.
Signed-off-by: Jerin Jacob <jer...@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavat...@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpu...@marvell.com>
---
config/common_base | 5 ++
drivers/event/Makefile | 1 +
drivers/event/meson.build | 2 +-
drivers/event/octeontx2/Makefile | 39 +++++++++++
drivers/event/octeontx2/meson.build | 21 ++++++
drivers/event/octeontx2/otx2_evdev.c | 70 +++++++++++++++++++
drivers/event/octeontx2/otx2_evdev.h | 26 +++++++
.../rte_pmd_octeontx2_event_version.map | 4 ++
mk/rte.app.mk | 2 +
9 files changed, 169 insertions(+), 1 deletion(-)
create mode 100644 drivers/event/octeontx2/Makefile
create mode 100644 drivers/event/octeontx2/meson.build
create mode 100644 drivers/event/octeontx2/otx2_evdev.c
create mode 100644 drivers/event/octeontx2/otx2_evdev.h
create mode 100644 drivers/event/octeontx2/rte_pmd_octeontx2_event_version.map
diff --git a/config/common_base b/config/common_base
index fa1ae249a..e85991e87 100644
--- a/config/common_base
+++ b/config/common_base
@@ -747,6 +747,11 @@ CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=n
#
CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=y
+#
+# Compile PMD for octeontx sso event device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV=y
+
#
# Compile librte_ring
#
diff --git a/drivers/event/Makefile b/drivers/event/Makefile
index 03ad1b6cb..e4e7eff37 100644
--- a/drivers/event/Makefile
+++ b/drivers/event/Makefile
@@ -15,5 +15,6 @@ ifeq ($(CONFIG_RTE_EAL_VFIO)$(CONFIG_RTE_LIBRTE_FSLMC_BUS),yy)
DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV) += dpaa2
endif
DIRS-$(CONFIG_RTE_LIBRTE_PMD_OPDL_EVENTDEV) += opdl
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += octeontx2
include $(RTE_SDK)/mk/rte.subdir.mk
diff --git a/drivers/event/meson.build b/drivers/event/meson.build
index fb723f727..b204a9f8d 100644
--- a/drivers/event/meson.build
+++ b/drivers/event/meson.build
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2017 Intel Corporation
-drivers = ['dpaa', 'dpaa2', 'opdl', 'skeleton', 'sw', 'dsw']
+drivers = ['dpaa', 'dpaa2', 'opdl', 'skeleton', 'sw', 'dsw', 'octeontx2']
if not (toolchain == 'gcc' and cc.version().version_compare('<4.8.6') and
dpdk_conf.has('RTE_ARCH_ARM64'))
drivers += 'octeontx'
diff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile
new file mode 100644
index 000000000..dbf6ec22d
--- /dev/null
+++ b/drivers/event/octeontx2/Makefile
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(C) 2019 Marvell International Ltd.
+#
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+#
+# library name
+#
+LIB = librte_pmd_octeontx2_event.a
+
+CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2
+CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx2
+CFLAGS += -I$(RTE_SDK)/drivers/event/octeontx2
+CFLAGS += -I$(RTE_SDK)/drivers/net/octeontx2
+CFLAGS += -O3
+CFLAGS += -DALLOW_EXPERIMENTAL_API
+
+ifneq ($(CONFIG_RTE_ARCH_64),y)
+CFLAGS += -Wno-int-to-pointer-cast
+CFLAGS += -Wno-pointer-to-int-cast
+endif
+
+EXPORT_MAP := rte_pmd_octeontx2_event_version.map
+
+LIBABIVER := 1
+
+#
+# all source are stored in SRCS-y
+#
+
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c
+
+LDLIBS += -lrte_eal -lrte_bus_pci -lrte_pci
+LDLIBS += -lrte_eventdev
+LDLIBS += -lrte_common_octeontx2
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/event/octeontx2/meson.build
b/drivers/event/octeontx2/meson.build
new file mode 100644
index 000000000..c4f442174
--- /dev/null
+++ b/drivers/event/octeontx2/meson.build
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(C) 2019 Marvell International Ltd.
+#
+
+sources = files('otx2_evdev.c')
+
+allow_experimental_apis = true
+
+extra_flags = []
+# This integrated controller runs only on a arm64 machine, remove 32bit
warnings
+if not dpdk_conf.get('RTE_ARCH_64')
+ extra_flags += ['-Wno-int-to-pointer-cast', '-Wno-pointer-to-int-cast']
+endif
+
+foreach flag: extra_flags
+ if cc.has_argument(flag)
+ cflags += flag
+ endif
+endforeach
+
+deps += ['bus_pci', 'common_octeontx2']
diff --git a/drivers/event/octeontx2/otx2_evdev.c
b/drivers/event/octeontx2/otx2_evdev.c
new file mode 100644
index 000000000..faffd3f0c
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include <inttypes.h>
+
+#include <rte_bus_pci.h>
+#include <rte_common.h>
+#include <rte_eal.h>
+#include <rte_eventdev_pmd_pci.h>
+#include <rte_pci.h>
+
+#include "otx2_evdev.h"
+
+static int
+otx2_sso_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
+{
+ return rte_event_pmd_pci_probe(pci_drv, pci_dev,
+ sizeof(struct otx2_sso_evdev),
+ otx2_sso_init);
+}
+
+static int
+otx2_sso_remove(struct rte_pci_device *pci_dev)
+{
+ return rte_event_pmd_pci_remove(pci_dev, otx2_sso_fini);
+}
+
+static const struct rte_pci_id pci_sso_map[] = {
+ {
+ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+ PCI_DEVID_OCTEONTX2_RVU_SSO_TIM_PF)
+ },
+ {
+ .vendor_id = 0,
+ },
+};
+
+static struct rte_pci_driver pci_sso = {
+ .id_table = pci_sso_map,
+ .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
+ .probe = otx2_sso_probe,
+ .remove = otx2_sso_remove,
+};
+
+int
+otx2_sso_init(struct rte_eventdev *event_dev)
+{
+ RTE_SET_USED(event_dev);
+ /* For secondary processes, the primary has done all the work */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ return 0;
+}
+
+int
+otx2_sso_fini(struct rte_eventdev *event_dev)
+{
+ RTE_SET_USED(event_dev);
+ /* For secondary processes, nothing to be done */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ return 0;
+}
+
+RTE_PMD_REGISTER_PCI(event_octeontx2, pci_sso);
+RTE_PMD_REGISTER_PCI_TABLE(event_octeontx2, pci_sso_map);
+RTE_PMD_REGISTER_KMOD_DEP(event_octeontx2, "vfio-pci");
diff --git a/drivers/event/octeontx2/otx2_evdev.h
b/drivers/event/octeontx2/otx2_evdev.h
new file mode 100644
index 000000000..1df233293
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef __OTX2_EVDEV_H__
+#define __OTX2_EVDEV_H__
+
+#include <rte_eventdev.h>
+
+#include "otx2_common.h"
+
+#define EVENTDEV_NAME_OCTEONTX2_PMD otx2_eventdev
+
+#define sso_func_trace otx2_sso_dbg
+
+#define OTX2_SSO_MAX_VHGRP RTE_EVENT_MAX_QUEUES_PER_DEV
+#define OTX2_SSO_MAX_VHWS (UINT8_MAX)
+
+struct otx2_sso_evdev {
+};
+
+/* Init and Fini API's */
+int otx2_sso_init(struct rte_eventdev *event_dev);
+int otx2_sso_fini(struct rte_eventdev *event_dev);
+
+#endif /* __OTX2_EVDEV_H__ */
diff --git a/drivers/event/octeontx2/rte_pmd_octeontx2_event_version.map
b/drivers/event/octeontx2/rte_pmd_octeontx2_event_version.map
new file mode 100644
index 000000000..41c65c8c9
--- /dev/null
+++ b/drivers/event/octeontx2/rte_pmd_octeontx2_event_version.map
@@ -0,0 +1,4 @@
+DPDK_19.08 {
+ local: *;
+};
+
diff --git a/mk/rte.app.mk b/mk/rte.app.mk
index 81be289a8..449589ad7 100644
--- a/mk/rte.app.mk
+++ b/mk/rte.app.mk
@@ -109,6 +109,7 @@ ifeq
($(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOO
_LDLIBS-y += -lrte_common_octeontx
endif
OCTEONTX2-y := $(CONFIG_RTE_LIBRTE_OCTEONTX2_MEMPOOL)
+OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV)
ifeq ($(findstring y,$(OCTEONTX2-y)),y)
_LDLIBS-y += -lrte_common_octeontx2
endif
@@ -293,6 +294,7 @@ endif # CONFIG_RTE_LIBRTE_FSLMC_BUS
_LDLIBS-$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL) += -lrte_mempool_octeontx
_LDLIBS-$(CONFIG_RTE_LIBRTE_OCTEONTX_PMD) += -lrte_pmd_octeontx
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OPDL_EVENTDEV) += -lrte_pmd_opdl_event
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) +=
-lrte_pmd_octeontx2_event
endif # CONFIG_RTE_LIBRTE_EVENTDEV
ifeq ($(CONFIG_RTE_LIBRTE_RAWDEV),y)
--
2.22.0
