On 6/13/2019 2:29 PM, Ferruh Yigit wrote: > On 6/12/2019 10:25 PM, Yongseok Koh wrote: >> >>> On Jun 11, 2019, at 10:32 PM, Shahaf Shuler <shah...@mellanox.com> wrote: >>> >>> 32b Compilation output the below error: >>> >>> drivers/net/mlx5/mlx5_txq.c: In function 'mlx5_txq_ibv_new': >>> error: format '%lx' expects argument of type 'long unsigned int', but >>> argument 8 has type 'off_t' [-Werror=format=] >>> DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx", >>> ^ >> >> off_t would have same size as pointer. >> Changing lx to PRIxPTR would work? > > 'off_t' is no more same size as pointer, please check [1], otherwise what you > said correct and code was working fine previously. > > Briefly, from build system we are asking/forcing off_t to be always 64-bit
Ahh, sorry I see what you mean after checking the patch J You are right, I thinks patch should be something like: - DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx", + DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%"PRIx64, > > [1]: https://mails.dpdk.org/archives/dev/2019-June/133819.html > >> >>> Fixes: 6bf10ab69be0 ("net/mlx5: support 32-bit systems") >>> Cc: sta...@dpdk.org >>> >>> Signed-off-by: Shahaf Shuler <shah...@mellanox.com> >>> --- >>> drivers/net/mlx5/mlx5_txq.c | 4 ++-- >>> 1 file changed, 2 insertions(+), 2 deletions(-) >>> >>> diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c >>> index ebb42cbffb..a421139e3c 100644 >>> --- a/drivers/net/mlx5/mlx5_txq.c >>> +++ b/drivers/net/mlx5/mlx5_txq.c >>> @@ -566,8 +566,8 @@ mlx5_txq_ibv_new(struct rte_eth_dev *dev, uint16_t idx) >>> txq_uar_init(txq_ctrl); >>> if (qp.comp_mask & MLX5DV_QP_MASK_UAR_MMAP_OFFSET) { >>> txq_ctrl->uar_mmap_offset = qp.uar_mmap_offset; >>> - DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx", >>> - dev->data->port_id, txq_ctrl->uar_mmap_offset); >>> + DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%x", >>> + dev->data->port_id, (int)(txq_ctrl->uar_mmap_offset)); >>> } else { >>> DRV_LOG(ERR, >>> "port %u failed to retrieve UAR info, invalid" >>> -- >>> 2.12.0 >>> >> >
