> -----Original Message-----
> From: Rong, Leyi
> Sent: Tuesday, June 11, 2019 8:52 AM
> To: Zhang, Qi Z <qi.z.zh...@intel.com>
> Cc: dev@dpdk.org; Rong, Leyi <leyi.r...@intel.com>; Stillwell Jr, Paul M
> <paul.m.stillwell...@intel.com>
> Subject: [PATCH v2 27/66] net/ice/base: add some minor features
>
> 1. Add loopback reporting to get link response.
> 2. Add infrastructure for NVM Write/Write Activate calls.
> 3. Add opcode for NVM save factory settings/NVM Update EMPR command.
> 4. Add lan overflow event to ice_aq_desc.
>
This seems like it should be split into separate patches. You also have 2
patches with the same commit title (27/66 & 30/66) which seems like a bad idea.
> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell...@intel.com>
> Signed-off-by: Leyi Rong <leyi.r...@intel.com>
> ---
> drivers/net/ice/base/ice_adminq_cmd.h | 47 ++++++++++++++++++--------
> -
> 1 file changed, 32 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/net/ice/base/ice_adminq_cmd.h
> b/drivers/net/ice/base/ice_adminq_cmd.h
> index 77f93b950..4e6bce18c 100644
> --- a/drivers/net/ice/base/ice_adminq_cmd.h
> +++ b/drivers/net/ice/base/ice_adminq_cmd.h
> @@ -110,6 +110,7 @@ struct ice_aqc_list_caps { struct
> ice_aqc_list_caps_elem {
> __le16 cap;
> #define ICE_AQC_CAPS_VALID_FUNCTIONS 0x0005
> +#define ICE_AQC_MAX_VALID_FUNCTIONS 0x8
> #define ICE_AQC_CAPS_VSI 0x0017
> #define ICE_AQC_CAPS_DCB 0x0018
> #define ICE_AQC_CAPS_RSS 0x0040
> @@ -143,11 +144,9 @@ struct ice_aqc_manage_mac_read {
> #define ICE_AQC_MAN_MAC_WOL_ADDR_VALID BIT(7)
> #define ICE_AQC_MAN_MAC_READ_S 4
> #define ICE_AQC_MAN_MAC_READ_M (0xF <<
> ICE_AQC_MAN_MAC_READ_S)
> - u8 lport_num;
> - u8 lport_num_valid;
> -#define ICE_AQC_MAN_MAC_PORT_NUM_IS_VALID BIT(0)
> + u8 rsvd[2];
> u8 num_addr; /* Used in response */
> - u8 reserved[3];
> + u8 rsvd1[3];
> __le32 addr_high;
> __le32 addr_low;
> };
> @@ -165,7 +164,7 @@ struct ice_aqc_manage_mac_read_resp {
>
> /* Manage MAC address, write command - direct (0x0108) */ struct
> ice_aqc_manage_mac_write {
> - u8 port_num;
> + u8 rsvd;
> u8 flags;
> #define ICE_AQC_MAN_MAC_WR_MC_MAG_EN BIT(0)
> #define ICE_AQC_MAN_MAC_WR_WOL_LAA_PFR_KEEP BIT(1)
> @@ -481,8 +480,8 @@ struct ice_aqc_vsi_props {
> #define ICE_AQ_VSI_VLAN_MODE_TAGGED 0x2
> #define ICE_AQ_VSI_VLAN_MODE_ALL 0x3
> #define ICE_AQ_VSI_PVLAN_INSERT_PVID BIT(2)
> -#define ICE_AQ_VSI_VLAN_EMOD_S 3
> -#define ICE_AQ_VSI_VLAN_EMOD_M (0x3 <<
> ICE_AQ_VSI_VLAN_EMOD_S)
> +#define ICE_AQ_VSI_VLAN_EMOD_S 3
> +#define ICE_AQ_VSI_VLAN_EMOD_M (0x3 <<
> ICE_AQ_VSI_VLAN_EMOD_S)
> #define ICE_AQ_VSI_VLAN_EMOD_STR_BOTH (0x0 <<
> ICE_AQ_VSI_VLAN_EMOD_S)
> #define ICE_AQ_VSI_VLAN_EMOD_STR_UP (0x1 <<
> ICE_AQ_VSI_VLAN_EMOD_S)
> #define ICE_AQ_VSI_VLAN_EMOD_STR (0x2 <<
> ICE_AQ_VSI_VLAN_EMOD_S)
> @@ -1425,6 +1424,7 @@ struct ice_aqc_get_phy_caps_data {
> #define ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN BIT(6)
> #define ICE_AQC_PHY_FEC_25G_KR_CLAUSE74_EN BIT(7)
> #define ICE_AQC_PHY_FEC_MASK
> MAKEMASK(0xdf, 0)
> + u8 rsvd1; /* Byte 35 reserved */
> u8 extended_compliance_code;
> #define ICE_MODULE_TYPE_TOTAL_BYTE 3
> u8 module_type[ICE_MODULE_TYPE_TOTAL_BYTE];
> @@ -1439,13 +1439,14 @@ struct ice_aqc_get_phy_caps_data {
> #define ICE_AQC_MOD_TYPE_BYTE2_SFP_PLUS 0xA0
> #define ICE_AQC_MOD_TYPE_BYTE2_QSFP_PLUS 0x86
> u8 qualified_module_count;
> + u8 rsvd2[7]; /* Bytes 47:41 reserved */
> #define ICE_AQC_QUAL_MOD_COUNT_MAX 16
> struct {
> u8 v_oui[3];
> u8 rsvd3;
> u8 v_part[16];
> __le32 v_rev;
> - __le64 rsvd8;
> + __le64 rsvd4;
> } qual_modules[ICE_AQC_QUAL_MOD_COUNT_MAX];
> };
>
> @@ -1571,7 +1572,12 @@ struct ice_aqc_get_link_status_data {
> #define ICE_AQ_LINK_TX_ACTIVE 0
> #define ICE_AQ_LINK_TX_DRAINED 1
> #define ICE_AQ_LINK_TX_FLUSHED 3
> - u8 reserved2;
> + u8 lb_status;
> +#define ICE_AQ_LINK_LB_PHY_LCL BIT(0)
> +#define ICE_AQ_LINK_LB_PHY_RMT BIT(1)
> +#define ICE_AQ_LINK_LB_MAC_LCL BIT(2)
> +#define ICE_AQ_LINK_LB_PHY_IDX_S 3
> +#define ICE_AQ_LINK_LB_PHY_IDX_M (0x7 <<
> ICE_AQ_LB_PHY_IDX_S)
> __le16 max_frame_size;
> u8 cfg;
> #define ICE_AQ_LINK_25G_KR_FEC_EN BIT(0)
> @@ -1659,20 +1665,26 @@ struct ice_aqc_set_port_id_led {
>
> /* NVM Read command (indirect 0x0701)
> * NVM Erase commands (direct 0x0702)
> - * NVM Update commands (indirect 0x0703)
> + * NVM Write commands (indirect 0x0703)
> + * NVM Write Activate commands (direct 0x0707)
> + * NVM Shadow RAM Dump commands (direct 0x0707)
> */
> struct ice_aqc_nvm {
> __le16 offset_low;
> u8 offset_high;
> u8 cmd_flags;
> #define ICE_AQC_NVM_LAST_CMD BIT(0)
> -#define ICE_AQC_NVM_PCIR_REQ BIT(0) /* Used by NVM
> Update reply */
> -#define ICE_AQC_NVM_PRESERVATION_S 1
> +#define ICE_AQC_NVM_PCIR_REQ BIT(0) /* Used by NVM
> Write reply */
> +#define ICE_AQC_NVM_PRESERVATION_S 1 /* Used by NVM Write
> Activate only */
> #define ICE_AQC_NVM_PRESERVATION_M (3 <<
> ICE_AQC_NVM_PRESERVATION_S)
> #define ICE_AQC_NVM_NO_PRESERVATION (0 <<
> ICE_AQC_NVM_PRESERVATION_S)
> #define ICE_AQC_NVM_PRESERVE_ALL BIT(1)
> #define ICE_AQC_NVM_FACTORY_DEFAULT (2 <<
> ICE_AQC_NVM_PRESERVATION_S)
> #define ICE_AQC_NVM_PRESERVE_SELECTED (3 <<
> ICE_AQC_NVM_PRESERVATION_S)
> +#define ICE_AQC_NVM_ACTIV_SEL_NVM BIT(3) /* Write Activate/SR
> Dump only */
> +#define ICE_AQC_NVM_ACTIV_SEL_OROM BIT(4)
> +#define ICE_AQC_NVM_ACTIV_SEL_EXT_TLV BIT(5)
> +#define ICE_AQC_NVM_ACTIV_SEL_MASK MAKEMASK(0x7, 3)
> #define ICE_AQC_NVM_FLASH_ONLY BIT(7)
> __le16 module_typeid;
> __le16 length;
> @@ -1832,7 +1844,7 @@ struct ice_aqc_get_cee_dcb_cfg_resp { };
>
> /* Set Local LLDP MIB (indirect 0x0A08)
> - * Used to replace the local MIB of a given LLDP agent. e.g. DCBx
> + * Used to replace the local MIB of a given LLDP agent. e.g. DCBX
> */
> struct ice_aqc_lldp_set_local_mib {
> u8 type;
> @@ -1857,7 +1869,7 @@ struct ice_aqc_lldp_set_local_mib_resp { };
>
> /* Stop/Start LLDP Agent (direct 0x0A09)
> - * Used for stopping/starting specific LLDP agent. e.g. DCBx.
> + * Used for stopping/starting specific LLDP agent. e.g. DCBX.
> * The same structure is used for the response, with the command field
> * being used as the status field.
> */
> @@ -2321,6 +2333,7 @@ struct ice_aq_desc {
> struct ice_aqc_set_mac_cfg set_mac_cfg;
> struct ice_aqc_set_event_mask set_event_mask;
> struct ice_aqc_get_link_status get_link_status;
> + struct ice_aqc_event_lan_overflow lan_overflow;
> } params;
> };
>
> @@ -2492,10 +2505,14 @@ enum ice_adminq_opc {
> /* NVM commands */
> ice_aqc_opc_nvm_read = 0x0701,
> ice_aqc_opc_nvm_erase = 0x0702,
> - ice_aqc_opc_nvm_update = 0x0703,
> + ice_aqc_opc_nvm_write = 0x0703,
> ice_aqc_opc_nvm_cfg_read = 0x0704,
> ice_aqc_opc_nvm_cfg_write = 0x0705,
> ice_aqc_opc_nvm_checksum = 0x0706,
> + ice_aqc_opc_nvm_write_activate = 0x0707,
> + ice_aqc_opc_nvm_sr_dump = 0x0707,
> + ice_aqc_opc_nvm_save_factory_settings = 0x0708,
> + ice_aqc_opc_nvm_update_empr = 0x0709,
>
> /* LLDP commands */
> ice_aqc_opc_lldp_get_mib = 0x0A00,
> --
> 2.17.1
