Hi Rosen, thank you for your comments.
> > > -----Original Message-----
> > From: Wei, Dan
> > Sent: Thursday, May 30, 2019 22:59
> > To: dev@dpdk.org
> > Cc: Yigit, Ferruh <ferruh.yi...@intel.com>; Wei, Dan
> > <dan....@intel.com>; Xu, Rosen <rosen...@intel.com>; sta...@dpdk.org
> > Subject: [DPDK v2] net/ipn3ke: modifications on AFU configurations
> >
> > Modify AFU configurations for new Blue Bitstream of A10 on N3000 card:
>
> Blue Bitstream is new term, pls explain it or take modification.
BBS is the abbreviation of Blue Bitsteam.
> > - AFU register access: RTL changes the UPL base address and the
> > read/write commands of register indirect access.
>
> What means UPL?
> Could you descript it in more common language?
UPL is the abbreviation of User Programable Logic which is the cotainer of
vBNG IP.
> > - Add delays to wait for the HW reset completion.
>
> Does HW same means with RTL?
It means RTL + DDR.
> > - Refine log for debug: print UPL_version not only for vBNG bit
> > stream, but also for other bit streams
> >
> > Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
> > Cc: rosen...@intel.com
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Dan Wei <dan....@intel.com>
> > ---
> > drivers/net/ipn3ke/ipn3ke_ethdev.c | 14 ++++++++++++--
> > drivers/net/ipn3ke/ipn3ke_ethdev.h | 9 +++++----
> > drivers/net/ipn3ke/ipn3ke_flow.c | 1 +
> > 3 files changed, 18 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c
> > b/drivers/net/ipn3ke/ipn3ke_ethdev.c
> > index 9079b57..84eb0e9 100644
> > --- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
> > +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
> > @@ -223,15 +223,25 @@
> > "LineSideMACType", &mac_type);
> > hw->retimer.mac_type = (int)mac_type;
> >
> > + /* After power on, wait until init done */
> > + while (IPN3KE_READ_REG(hw, IPN3KE_INIT_DONE) != 0x3)
> > + ;
> > +
> > + IPN3KE_AFU_PMD_DEBUG("UPL_version is 0x%x\n",
> > IPN3KE_READ_REG(hw, 0));
> > +
> > if (afu_dev->id.uuid.uuid_low == IPN3KE_UUID_VBNG_LOW &&
> > afu_dev->id.uuid.uuid_high == IPN3KE_UUID_VBNG_HIGH) {
> > ipn3ke_hw_cap_init(hw);
> > - IPN3KE_AFU_PMD_DEBUG("UPL_version is 0x%x\n",
> > - IPN3KE_READ_REG(hw, 0));
>
> Why did you remove Debug code?
The debug code is moved up. Not only the version of vBNG Bitsteam, but also
that of other bitsteams, should be printed out.
> > /* Reset FPGA IP */
> > IPN3KE_WRITE_REG(hw, IPN3KE_CTRL_RESET, 1);
> > + rte_delay_us(10);
> > IPN3KE_WRITE_REG(hw, IPN3KE_CTRL_RESET, 0);
> > +
> > + /* After reset, wait until init done */
> > + while (IPN3KE_READ_REG(hw, IPN3KE_INIT_DONE) != 0x3)
> > + ;
> > + rte_delay_us(10);
> > }
