Hi,
-----Original Message-----
From: Xu, Rosen
Sent: Friday, May 24, 2019 11:07 AM
To: Wei, Dan <dan....@intel.com>; dev@dpdk.org
Cc: Yigit, Ferruh <ferruh.yi...@intel.com>; Chen, Santos
<santos.c...@intel.com>; sta...@dpdk.org
Subject: RE: [DPDK] net/ipn3ke: modifications on AFU configurations
Hi,
> > -----Original Message-----
> > From: Wei, Dan
> > Sent: Friday, May 24, 2019 23:01
> > To: dev@dpdk.org
> > Cc: Yigit, Ferruh <ferruh.yi...@intel.com>; Chen, Santos
> > <santos.c...@intel.com>; Wei, Dan <dan....@intel.com>; Xu, Rosen
> > <rosen...@intel.com>; sta...@dpdk.org
> > Subject: [DPDK] net/ipn3ke: modifications on AFU configurations
> Pls figure out exact modification in title.
> My understanding this patch is for AFU register access, is it so?
Besides AFU register access, there are other modifications listed in the commit
message body.
> > Modify AFU configurations for new Blue Bitstream of A10 on N3000 card:
> > - AFU register access
> > - AFU configuration should wait until the HW set the INIT_DONE flag
> > - Refine log for debug
> Could you take more description about this modification?
- AFU register access: RTL changes the UPL base address and the read/write
commands of register indirect access
- AFU configuration should wait until the HW set the INIT_DONE flag: The reset
lasts for a long time in the new version of BBS.
AFU configuration should wait for the end of reset with the setting of the
INIT_DONE flag.
- Refine log for debug: print UPL_version not only for vBNG bit stream, but
also for other bit streams.
> > Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
> > Cc: rosen...@intel.com
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Dan Wei <dan....@intel.com>
> > ---
> > drivers/net/ipn3ke/ipn3ke_ethdev.c | 8 ++++++--
> > drivers/net/ipn3ke/ipn3ke_ethdev.h | 9 +++++----
> > drivers/net/ipn3ke/ipn3ke_flow.c | 1 +
> > 3 files changed, 12 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c
> > b/drivers/net/ipn3ke/ipn3ke_ethdev.c
> > index 9079b57..cadfadd 100644
> > --- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
> > +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
> > @@ -223,11 +223,15 @@
> > "LineSideMACType", &mac_type);
> > hw->retimer.mac_type = (int)mac_type;
> >
> > + /* Wait until init done */
> > + while (IPN3KE_READ_REG(hw, IPN3KE_INIT_DONE) != 0x3)
> > + ;
> > +
> > + IPN3KE_AFU_PMD_DEBUG("UPL_version is 0x%x\n",
> > IPN3KE_READ_REG(hw, 0));
> > +
> > if (afu_dev->id.uuid.uuid_low == IPN3KE_UUID_VBNG_LOW &&
> > afu_dev->id.uuid.uuid_high == IPN3KE_UUID_VBNG_HIGH) {
> > ipn3ke_hw_cap_init(hw);
> > - IPN3KE_AFU_PMD_DEBUG("UPL_version is 0x%x\n",
> > - IPN3KE_READ_REG(hw, 0));
> Why remove this debug output?
The debug output isn't removed but moved up. Print UPL_version not only for
vBNG bit stream, but also for other bit streams.
> > /* Reset FPGA IP */
> > IPN3KE_WRITE_REG(hw, IPN3KE_CTRL_RESET, 1); diff --git
> > a/drivers/net/ipn3ke/ipn3ke_ethdev.h
> > b/drivers/net/ipn3ke/ipn3ke_ethdev.h
> > index bfda9d5..686c12f 100644
> > --- a/drivers/net/ipn3ke/ipn3ke_ethdev.h
> > +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h
> > @@ -344,7 +344,6 @@ static inline uint32_t ipn3ke_read_addr(volatile
> > void
> > *addr)
> >
> > #define WCMD 0x8000000000000000
> > #define RCMD 0x4000000000000000
> > -#define UPL_BASE 0x10000
> > static inline uint32_t _ipn3ke_indrct_read(struct ipn3ke_hw *hw,
> > uint32_t addr)
> > {
> > @@ -355,13 +354,13 @@ static inline uint32_t
> > _ipn3ke_indrct_read(struct ipn3ke_hw *hw,
> >
> > word_offset = (addr & 0x1FFFFFF) >> 2;
> > indirect_value = RCMD | word_offset << 32;
> > - indirect_addrs = hw->hw_addr + (uint32_t)(UPL_BASE | 0x10);
> > + indirect_addrs = hw->hw_addr + (uint32_t)(0x30);
> >
> > rte_delay_us(10);
> >
> > rte_write64((rte_cpu_to_le_64(indirect_value)), indirect_addrs);
> >
> > - indirect_addrs = hw->hw_addr + (uint32_t)(UPL_BASE | 0x18);
> > + indirect_addrs = hw->hw_addr + (uint32_t)(0x38);
> > while ((read_data >> 32) != 1)
> > read_data = rte_read64(indirect_addrs);
> >
> > @@ -377,7 +376,7 @@ static inline void _ipn3ke_indrct_write(struct
> > ipn3ke_hw *hw,
> >
> > word_offset = (addr & 0x1FFFFFF) >> 2;
> > indirect_value = WCMD | word_offset << 32 | value;
> > - indirect_addrs = hw->hw_addr + (uint32_t)(UPL_BASE | 0x10);
> > + indirect_addrs = hw->hw_addr + (uint32_t)(0x30);
> >
> > rte_write64((rte_cpu_to_le_64(indirect_value)), indirect_addrs);
> > rte_delay_us(10);
> > @@ -411,6 +410,7 @@ static inline void _ipn3ke_indrct_write(struct
> > ipn3ke_hw *hw,
> > (&(((struct ipn3ke_rpst *)(dev)->data->dev_private)->tm))
> >
> > /* Byte address of IPN3KE internal module */
> > +#define IPN3KE_INIT_DONE (0x204)
> > #define IPN3KE_TM_VERSION (IPN3KE_QM_OFFSET + 0x0000)
> > #define IPN3KE_TM_SCRATCH (IPN3KE_QM_OFFSET + 0x0004)
> > #define IPN3KE_TM_STATUS (IPN3KE_QM_OFFSET + 0x0008)
> > @@ -500,6 +500,7 @@ static inline void _ipn3ke_indrct_write(struct
> > ipn3ke_hw *hw,
> > #define IPN3KE_CLF_RX_TEST (IPN3KE_CLASSIFY_OFFSET +
> > 0x0400)
> >
> > #define IPN3KE_CLF_EM_VERSION (IPN3KE_CLASSIFY_OFFSET + 0x40000
> > + 0x0000)
> > +#define IPN3KE_CLF_EM_SCRATCH (IPN3KE_CLASSIFY_OFFSET + 0x40000
> > + 0x0004)
> > #define IPN3KE_CLF_EM_NUM (IPN3KE_CLASSIFY_OFFSET + 0x40000 +
> > 0x0008)
> > #define IPN3KE_CLF_EM_KEY_WDTH (IPN3KE_CLASSIFY_OFFSET +
> > 0x40000 + 0x000C)
> > #define IPN3KE_CLF_EM_RES_WDTH (IPN3KE_CLASSIFY_OFFSET +
> > 0x40000 + 0x0010)
> > diff --git a/drivers/net/ipn3ke/ipn3ke_flow.c
> > b/drivers/net/ipn3ke/ipn3ke_flow.c
> > index e5937df..ff9f064 100644
> > --- a/drivers/net/ipn3ke/ipn3ke_flow.c
> > +++ b/drivers/net/ipn3ke/ipn3ke_flow.c
> > @@ -1360,6 +1360,7 @@ int ipn3ke_flow_init(void *dev)
> > IPN3KE_CLF_EM_NUM,
> > 0,
> > 0xFFFFFFFF);
> > + IPN3KE_AFU_PMD_DEBUG("IPN3KE_CLF_EN_NUM: %x\n", hw-
> > >flow_max_entries);
> > hw->flow_num_entries = 0;
> >
> > return 0;
> > --
> > 1.8.3.1
