Hi Yongseok,

PSB

> -----Original Message-----
> From: Yongseok Koh
> Sent: Thursday, April 18, 2019 3:39 AM
> To: Ori Kam <or...@mellanox.com>
> Cc: Shahaf Shuler <shah...@mellanox.com>; Matan Azrad
> <ma...@mellanox.com>; Slava Ovsiienko <viachesl...@mellanox.com>; Moti
> Haimovsky <mo...@mellanox.com>; dev@dpdk.org
> Subject: Re: [PATCH 6/9] net/mlx5: add transfer attribute to matcher
> 
> On Sun, Apr 14, 2019 at 09:12:34PM +0000, Ori Kam wrote:
> > In current implementation the DV steering supported only NIC steering.
> > This commit adds the transfer attribute in order to create a matcher
> > on the FDB tabels.
> >
> > Signed-off-by: Ori Kam <or...@mellanox.com>
> > ---
> >  drivers/net/mlx5/mlx5_flow.c    |  1 +
> >  drivers/net/mlx5/mlx5_flow.h    |  2 ++
> >  drivers/net/mlx5/mlx5_flow_dv.c | 22 ++++++++++++++++++----
> >  3 files changed, 21 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
> > index 83abc14..9fd5096 100644
> > --- a/drivers/net/mlx5/mlx5_flow.c
> > +++ b/drivers/net/mlx5/mlx5_flow.c
> > @@ -2095,6 +2095,7 @@ uint32_t mlx5_flow_adjust_priority(struct
> rte_eth_dev *dev, int32_t priority,
> >     flow = rte_calloc(__func__, 1, flow_size, 0);
> >     flow->drv_type = flow_get_drv_type(dev, attr);
> >     flow->ingress = attr->ingress;
> > +   flow->transfer = attr->transfer;
> >     assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
> >            flow->drv_type < MLX5_FLOW_TYPE_MAX);
> >     flow->queue = (void *)(flow + 1);
> > diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
> > index 85954c2..9d72024 100644
> > --- a/drivers/net/mlx5/mlx5_flow.h
> > +++ b/drivers/net/mlx5/mlx5_flow.h
> > @@ -210,6 +210,7 @@ struct mlx5_flow_dv_matcher {
> >     uint16_t crc; /**< CRC of key. */
> >     uint16_t priority; /**< Priority of matcher. */
> >     uint8_t egress; /**< Egress matcher. */
> > +   uint8_t transfer; /**< 1 if the flow is E-Switch flow. */
> 
> egress and transfer can be bit fields? Those come from rte_flow_attr but I 
> don't
> understand why it needs to be uint8_t individually.
> 

You are correct but since the egress was already defined like this I didn't 
want to add my code differently.
I don't care to change the new code to bit mask and in later patch (after this 
release) modify also the egress;

> >     uint32_t group; /**< The matcher group. */
> >     struct mlx5_flow_dv_match_params mask; /**< Matcher mask. */
> >  };
> > @@ -382,6 +383,7 @@ struct rte_flow {
> >     struct mlx5_fdir *fdir; /**< Pointer to associated FDIR if any. */
> >     uint8_t ingress; /**< 1 if the flow is ingress. */
> >     uint32_t group; /**< The group index. */
> > +   uint8_t transfer; /**< 1 if the flow is E-Switch flow. */
> 
> Bit-field?
> 

Same as above comment to keep with the ingress variable.

> Just out of curiosity, flow->ingress vs matcher->egress, why?
> rte_flow_attr has both ingress and egress because a flow can be applied for
> both
> directions. But, in mlx5 PMD, it looks exclusive - !ingress == egress vice
> versa. Then, I don't understand why one has ingress and the other one has
> egress even wasting bits.
> 

First I agree it is confusing. But it doesn't waste bits since in any case we 
must store a bit in each structure. 
In any case I think I also should put it in my future commites.

> >  };
> >
> >  typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev,
> > diff --git a/drivers/net/mlx5/mlx5_flow_dv.c
> b/drivers/net/mlx5/mlx5_flow_dv.c
> > index e66ee34..b4ca9ca 100644
> > --- a/drivers/net/mlx5/mlx5_flow_dv.c
> > +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> > @@ -3203,6 +3203,8 @@ struct field_modify_info modify_tcp[] = {
> >   *   Table id to use.
> >   * @param[in] egress
> >   *   Direction of the table.
> > + * @param[in] transfer
> > + *   E-Switch or Nic flow..
> 
> Redundant periods (..)
> Nic -> NIC
> 

Will fix.

> 
> Thanks,
> Yongseok
> 
> >   * @param[out] error
> >   *   pointer to error structure.
> >   *
> > @@ -3212,6 +3214,7 @@ struct field_modify_info modify_tcp[] = {
> >  static struct mlx5_flow_tbl_resource *
> >  flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
> >                      uint32_t table_id, uint8_t egress,
> > +                    uint8_t transfer,
> >                      struct rte_flow_error *error)
> >  {
> >     struct mlx5_priv *priv = dev->data->dev_private;
> > @@ -3219,7 +3222,12 @@ struct field_modify_info modify_tcp[] = {
> >     struct mlx5_flow_tbl_resource *tbl;
> >
> >  #ifdef HAVE_MLX5DV_DR
> > -   if (egress) {
> > +   if (transfer) {
> > +           tbl = &sh->fdb_tbl[table_id];
> > +           if (!tbl->obj)
> > +                   tbl->obj = mlx5_glue->dr_create_flow_tbl
> > +                           (sh->fdb_ns, table_id);
> > +   } else if (egress) {
> >             tbl = &sh->tx_tbl[table_id];
> >             if (!tbl->obj)
> >                     tbl->obj = mlx5_glue->dr_create_flow_tbl
> > @@ -3241,7 +3249,9 @@ struct field_modify_info modify_tcp[] = {
> >  #else
> >     (void)error;
> >     (void)tbl;
> > -   if (egress)
> > +   if (transfer)
> > +           return &sh->fdb_tbl[table_id];
> > +   else if (egress)
> >             return &sh->tx_tbl[table_id];
> >     else
> >             return &sh->rx_tbl[table_id];
> > @@ -3306,6 +3316,7 @@ struct field_modify_info modify_tcp[] = {
> >                 matcher->priority == cache_matcher->priority &&
> >                 matcher->egress == cache_matcher->egress &&
> >                 matcher->group == cache_matcher->group &&
> > +               matcher->transfer == cache_matcher->transfer &&
> >                 !memcmp((const void *)matcher->mask.buf,
> >                         (const void *)cache_matcher->mask.buf,
> >                         cache_matcher->mask.size)) {
> > @@ -3327,7 +3338,8 @@ struct field_modify_info modify_tcp[] = {
> >
> RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
> >                                       "cannot allocate matcher memory");
> >     tbl = flow_dv_tbl_resource_get(dev, matcher->group *
> MLX5_GROUP_FACTOR,
> > -                                  matcher->egress, error);
> > +                                  matcher->egress, matcher->transfer,
> > +                                  error);
> >     if (!tbl) {
> >             rte_free(cache_matcher);
> >             return rte_flow_error_set(error, ENOMEM,
> > @@ -3654,7 +3666,8 @@ struct field_modify_info modify_tcp[] = {
> >                     jump_data = action->conf;
> >                     tbl = flow_dv_tbl_resource_get(dev, jump_data->group
> *
> >                                                    MLX5_GROUP_FACTOR,
> > -                                                  attr->egress, error);
> > +                                                  attr->egress,
> > +                                                  attr->transfer, error);
> >                     if (!tbl)
> >                             return rte_flow_error_set
> >                                             (error, errno,
> > @@ -3882,6 +3895,7 @@ struct field_modify_info modify_tcp[] = {
> >                                                  matcher.priority);
> >     matcher.egress = attr->egress;
> >     matcher.group = attr->group;
> > +   matcher.transfer = attr->transfer;
> >     if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
> >             return -rte_errno;
> >     return 0;
> > --
> > 1.8.3.1
> >

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