define the macros so we can remove various #if defined(RTE_ARCH_X86) Ref: https://bugs.dpdk.org/show_bug.cgi?id=35#c6
Signed-off-by: Natanael Copa <nc...@alpinelinux.org> --- v1 -> v2 fixed coding style issues reported by checkpatch drivers/bus/pci/linux/pci_uio.c | 54 +++++++++++++++------------------ 1 file changed, 24 insertions(+), 30 deletions(-) diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c index e1dd8c875..b0470358d 100644 --- a/drivers/bus/pci/linux/pci_uio.c +++ b/drivers/bus/pci/linux/pci_uio.c @@ -14,11 +14,18 @@ #if defined(RTE_ARCH_X86) #include <sys/io.h> + +#define pci_uio_inl(reg) inl(reg) +#define pci_uio_inw(reg) inw(reg) +#define pci_uio_inb(reg) inb(reg) + #if defined(__GLIBC__) + #define pci_uio_outl_p outl_p #define pci_uio_outw_p outw_p #define pci_uio_outb_p outb_p -#else + +#else /* defined(__GLIBC__) */ static inline void pci_uio_outl_p(unsigned int value, unsigned short int port) { @@ -39,8 +46,19 @@ pci_uio_outb_p(unsigned char value, unsigned short int port) __asm__ __volatile__ ("outb %b0,%w1\noutb %%al,$0x80" : : "a" (value), "Nd" (port)); } -#endif -#endif +#endif /* defined(__GLIBC__) */ + +#else /* RTE_ARCH_X86 */ + +#define pci_uio_inl(reg) (*(volatile uint32_t *)(reg)) +#define pci_uio_inw(reg) (*(volatile uint16_t *)(reg)) +#define pci_uio_inb(reg) (*(volatile uint8_t *)(reg)) + +#define pci_uio_outl_p(value, reg) (*(volatile uint32_t *)(reg) = (value)) +#define pci_uio_outw_p(value, reg) (*(volatile uint16_t *)(reg) = (value)) +#define pci_uio_outb_p(value, reg) (*(volatile uint8_t *)(reg) = (value)) + +#endif /* RTE_ARCH_X86 */ #include <rte_log.h> #include <rte_pci.h> @@ -518,25 +536,13 @@ pci_uio_ioport_read(struct rte_pci_ioport *p, for (d = data; len > 0; d += size, reg += size, len -= size) { if (len >= 4) { size = 4; -#if defined(RTE_ARCH_X86) - *(uint32_t *)d = inl(reg); -#else - *(uint32_t *)d = *(volatile uint32_t *)reg; -#endif + *(uint32_t *)d = pci_uio_inl(reg); } else if (len >= 2) { size = 2; -#if defined(RTE_ARCH_X86) - *(uint16_t *)d = inw(reg); -#else - *(uint16_t *)d = *(volatile uint16_t *)reg; -#endif + *(uint16_t *)d = pci_uio_inw(reg); } else { size = 1; -#if defined(RTE_ARCH_X86) - *d = inb(reg); -#else - *d = *(volatile uint8_t *)reg; -#endif + *d = pci_uio_inb(reg); } } } @@ -552,25 +558,13 @@ pci_uio_ioport_write(struct rte_pci_ioport *p, for (s = data; len > 0; s += size, reg += size, len -= size) { if (len >= 4) { size = 4; -#if defined(RTE_ARCH_X86) pci_uio_outl_p(*(const uint32_t *)s, reg); -#else - *(volatile uint32_t *)reg = *(const uint32_t *)s; -#endif } else if (len >= 2) { size = 2; -#if defined(RTE_ARCH_X86) pci_uio_outw_p(*(const uint16_t *)s, reg); -#else - *(volatile uint16_t *)reg = *(const uint16_t *)s; -#endif } else { size = 1; -#if defined(RTE_ARCH_X86) pci_uio_outb_p(*s, reg); -#else - *(volatile uint8_t *)reg = *s; -#endif } } } -- 2.21.0