There was a known link issue on 40G ports on NVM version (FVL3E),
when setting phy configuration. As a workaround, setting of phy
configuration should be disabled. The impact is that the link cannot
be forcedly configured, which doesn't affect any feature functions.
The workaround can be removed when a formal fix is ready later.
Signed-off-by: Helin Zhang <helin.zhang at intel.com>
---
lib/librte_pmd_i40e/i40e_ethdev.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c
b/lib/librte_pmd_i40e/i40e_ethdev.c
index 40c90d7..49d1067 100644
--- a/lib/librte_pmd_i40e/i40e_ethdev.c
+++ b/lib/librte_pmd_i40e/i40e_ethdev.c
@@ -791,6 +791,10 @@ i40e_phy_conf_link(struct i40e_hw *hw, uint8_t abilities,
uint8_t force_speed)
I40E_LINK_SPEED_100MB;
int ret = -ENOTSUP;
+ /* Skip it on 40G interfaces, as a workaround for the link issue */
+ if (i40e_is_40G_device(hw->device_id))
+ return I40E_SUCCESS;
+
status = i40e_aq_get_phy_capabilities(hw, false, false, &phy_ab,
NULL);
if (status)
--
1.8.1.4
