Tested-by:huilong xu <huilongx.xu at intel.com>
- Tested Commit: 0095bb6dd77a6b4570af27320187e63bf37500c6
- OS: FC20 3.11.10-301.fc20.x86_64
- GCC: gcc version 4.8.3 20140911 (Red Hat 4.8.3-7) (GCC)
- CPU: Intel(R) Xeon(R) CPU E5-2680 v2 @ 2.80GHz
- NIC: Ethernet controller [0200]: Intel Corporation Ethernet Controller XL710
for 40GbE QSFP+ [8086:1584]
- Default x86_64-native-linuxapp-gcc configuration
- Total 6 cases, 6 passed, 0 failed
1vf/1pf test environment set up:
1.build and install dpdk driver, bind igb_uio to PF
2.create 1vf in host
echo 1 > ./devices/pci0000:80/0000:80:00.0/0000:83:00.0/max_vfs
echo 1 > ./devices/pci0000:80/0000:80:02.0/0000:85:00.0/max_vfs
3. dettach VF nic
virsh nodedev-dettach pci_0000_83_02_0
virsh nodedev-dettach pci_0000_85_02_0
4. run testpmd in host
./testpmd -c f -n 4 -- -i --max-pkt-len=9000
5. start vm
taskset -c 6-10 qemu-system-x86_64 \
-enable-kvm -m 8192 -smp 2 -cpu host -name dpdk15-vm2 \
-drive file=/home/image/vdisk02-sriov-fc20.img \
-net tap,script=/etc/qemu-ifup \
-device pci-assign,bus=pci.0,addr=0xb,host=83:02.0 \
-device pci-assign,bus=pci.0,addr=0xc,host=85:02.0 \
-mem-path /dev/hugepages -mem-prealloc \
-vnc :12 -daemonize
6. in VM build and install dpdk driver ,bind igb_uio to VF
7. run testpmd in VM
./testpmd -c f -n 4 -- -i --max-pkt-len=9000 --txqflags=0
8. exec cmd line in vm
set fwd mac
start
- Case 1: send package dst mac is VF MAC, pkt size 9000, ixia can received
package and size is 9000,this case passed
- Case 2: send package dst mac is VF MAC, pkt size 9001, ixia can't received
package, this case passed
- Case 3: send package dst mac is VF MAC, pkt size 8999, ixia can received
package and size is 8999,this case passed
2vf/1pf test environment set up:
1.build and install dpdk driver, bind igb_uio to PF
2.create 1vf in host
echo 2 > ./devices/pci0000:80/0000:80:02.0/0000:83:00.0/max_vfs
3. dettach VF nic
virsh nodedev-dettach pci_0000_83_02_0
virsh nodedev-dettach pci_0000_83_02_1
4. run testpmd in host
./testpmd -c f -n 4 -- -i --max-pkt-len=9000
5. start vm
taskset -c 6-10 qemu-system-x86_64 \
-enable-kvm -m 8192 -smp 2 -cpu host -name dpdk15-vm2 \
-drive file=/home/image/vdisk02-sriov-fc20.img \
-net tap,script=/etc/qemu-ifup \
-device pci-assign,bus=pci.0,addr=0xb,host=83:02.0 \
-device pci-assign,bus=pci.0,addr=0xb,host=83:02.1 \
-mem-path /dev/hugepages -mem-prealloc \
-vnc :12 -daemonize
6. in VM build and install dpdk driver ,bind igb_uio to VF
7. run testpmd in VM
./testpmd -c f -n 4 -- -i --max-pkt-len=9000 --txqflags=0
8. exec cmd line in vm
set fwd mac
start
- Case 1: send package dst mac is VF MAC, pkt size 9000, ixia can received
package and size is 9000,this case passed
- Case 2: send package dst mac is VF MAC, pkt size 9001, ixia can't received
package,this case passed
- Case 3: send package dst mac is VF MAC, pkt size 8999, ixia can received
package and size is 8999,this case passed
-----Original Message-----
From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Helin Zhang
Sent: Wednesday, April 22, 2015 3:19 PM
To: dev at dpdk.org
Subject: [dpdk-dev] [PATCH] i40evf: fix of supporting jumbo frame
It wouldn't check the configured maximum packet length, and then
the scattered receiving function wouldn't be selected at all even
if it wants to receive a jumbo frame. The fix is to select the
correct RX function according to the configurations.
Signed-off-by: Helin Zhang <helin.zhang at intel.com>
---
lib/librte_pmd_i40e/i40e_ethdev.h | 2 +
lib/librte_pmd_i40e/i40e_ethdev_vf.c | 64 ++++++++++++++++++++++++++++++---
lib/librte_pmd_i40e/i40e_rxtx.c | 1 -
3 files changed, 60 insertions(+), 7 deletions(-)
diff --git a/lib/librte_pmd_i40e/i40e_ethdev.h
b/lib/librte_pmd_i40e/i40e_ethdev.h
index b9bed5a..7ecd249 100644
--- a/lib/librte_pmd_i40e/i40e_ethdev.h
+++ b/lib/librte_pmd_i40e/i40e_ethdev.h
@@ -36,6 +36,8 @@
#include <rte_eth_ctrl.h>
+#define I40E_VLAN_TAG_SIZE 4
+
#define I40E_AQ_LEN 32
#define I40E_AQ_BUF_SZ 4096
/* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64 */
diff --git a/lib/librte_pmd_i40e/i40e_ethdev_vf.c
b/lib/librte_pmd_i40e/i40e_ethdev_vf.c
index 4581c5b..718387f 100644
--- a/lib/librte_pmd_i40e/i40e_ethdev_vf.c
+++ b/lib/librte_pmd_i40e/i40e_ethdev_vf.c
@@ -1419,23 +1419,75 @@ i40evf_vlan_filter_set(struct rte_eth_dev *dev,
uint16_t vlan_id, int on)
}
static int
+i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
+{
+ struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct rte_eth_dev_data *dev_data = dev->data;
+ struct rte_pktmbuf_pool_private *mbp_priv;
+ uint16_t buf_size, len;
+
+ rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
+ I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
+ I40EVF_WRITE_FLUSH(hw);
+
+ /* Calculate the maximum packet length allowed */
+ mbp_priv = rte_mempool_get_priv(rxq->mp);
+ buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
+ RTE_PKTMBUF_HEADROOM);
+ rxq->hs_mode = i40e_header_split_none;
+ rxq->rx_hdr_len = 0;
+ rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
+ len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
+ rxq->max_pkt_len = RTE_MIN(len,
+ dev_data->dev_conf.rxmode.max_rx_pkt_len);
+
+ /**
+ * Check the if the jumbo frame and maximum packet length are
+ * set correctly
+ */
+ if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
+ if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
+ rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
+ PMD_DRV_LOG(ERR, "maximum packet length must be "
+ "larger than %u and smaller than %u, as jumbo "
+ "frame is enabled", (uint32_t)ETHER_MAX_LEN,
+ (uint32_t)I40E_FRAME_SIZE_MAX);
+ return I40E_ERR_CONFIG;
+ }
+ } else {
+ if (rxq->max_pkt_len < ETHER_MIN_LEN ||
+ rxq->max_pkt_len > ETHER_MAX_LEN) {
+ PMD_DRV_LOG(ERR, "maximum packet length must be "
+ "larger than %u and smaller than %u, as jumbo "
+ "frame is disabled", (uint32_t)ETHER_MIN_LEN,
+ (uint32_t)ETHER_MAX_LEN);
+ return I40E_ERR_CONFIG;
+ }
+ }
+
+ if (dev_data->dev_conf.rxmode.enable_scatter
+ || (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
+ dev_data->scattered_rx = 1;
+ dev->rx_pkt_burst = i40e_recv_scattered_pkts;
+ }
+
+ return 0;
+}
+
+static int
i40evf_rx_init(struct rte_eth_dev *dev)
{
struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
uint16_t i;
struct i40e_rx_queue **rxq =
(struct i40e_rx_queue **)dev->data->rx_queues;
- struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
i40evf_config_rss(vf);
for (i = 0; i < dev->data->nb_rx_queues; i++) {
- rxq[i]->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(i);
- I40E_PCI_REG_WRITE(rxq[i]->qrx_tail, rxq[i]->nb_rx_desc - 1);
+ if (i40evf_rxq_init(dev, rxq[i]) < 0)
+ return -EFAULT;
}
- /* Flush the operation to write registers */
- I40EVF_WRITE_FLUSH(hw);
-
return 0;
}
diff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c
index abe68f4..b13f298 100644
--- a/lib/librte_pmd_i40e/i40e_rxtx.c
+++ b/lib/librte_pmd_i40e/i40e_rxtx.c
@@ -64,7 +64,6 @@
#define DEFAULT_TX_FREE_THRESH 32
#define I40E_MAX_PKT_TYPE 256
-#define I40E_VLAN_TAG_SIZE 4
#define I40E_TX_MAX_BURST 32
#define I40E_DMA_MEM_ALIGN 4096
--
1.7.7
