From: Tejasree Kondoj <kondoj.tejas...@caviumnetworks.com>
Signed-off-by: Ankur Dwivedi <ankur.dwiv...@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.jos...@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.mur...@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpu...@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayara...@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssriniva...@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejas...@caviumnetworks.com>
---
drivers/crypto/octeontx/otx_cryptodev_hw_access.h | 63 +++++++++++++++++++++--
drivers/crypto/octeontx/otx_cryptodev_ops.c | 47 ++++++++++++++++-
2 files changed, 105 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
index f2d7ee7..6278cf9 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
@@ -8,12 +8,14 @@
#include <stdbool.h>
#include <rte_branch_prediction.h>
+#include <rte_cycles.h>
#include <rte_io.h>
#include <rte_memory.h>
#include <rte_prefetch.h>
#include "cpt_common.h"
#include "cpt_hw_types.h"
+#include "cpt_mcode_defines.h"
#include "cpt_pmd_logs.h"
/* Flags to indicate the features supported */
@@ -256,10 +258,63 @@ static __rte_always_inline uint8_t
check_nb_command_id(struct cpt_request_info *user_req,
struct cpt_instance *instance)
{
- /* Required for dequeue operation. Adding a dummy routine for now */
- RTE_SET_USED(user_req);
- RTE_SET_USED(instance);
- return 0;
+ uint8_t ret = ERR_REQ_PENDING;
+ struct cpt_vf *cptvf = (struct cpt_vf *)instance;
+ volatile cpt_res_s_t *cptres;
+
+ cptres = (volatile cpt_res_s_t *)user_req->completion_addr;
+
+ if (unlikely(cptres->s8x.compcode == CPT_8X_COMP_E_NOTDONE)) {
+ /*
+ * Wait for some time for this command to get completed
+ * before timing out
+ */
+ if (rte_get_timer_cycles() < user_req->time_out)
+ return ret;
+ /*
+ * TODO: See if alternate caddr can be used to not loop
+ * longer than needed.
+ */
+ if ((cptres->s8x.compcode == CPT_8X_COMP_E_NOTDONE) &&
+ (user_req->extra_time < TIME_IN_RESET_COUNT)) {
+ user_req->extra_time++;
+ return ret;
+ }
+
+ if (cptres->s8x.compcode != CPT_8X_COMP_E_NOTDONE)
+ goto complete;
+
+ ret = ERR_REQ_TIMEOUT;
+ CPT_LOG_DP_ERR("Request %p timedout\n", user_req);
+ otx_cpt_poll_misc(cptvf);
+ goto exit;
+ }
+
+complete:
+ if (likely(cptres->s8x.compcode == CPT_8X_COMP_E_GOOD)) {
+ ret = 0; /* success */
+ CPT_LOG_DP_DEBUG("MC status %.8x\n",
+ *((volatile uint32_t *)user_req->alternate_caddr));
+ CPT_LOG_DP_DEBUG("HW status %.8x\n",
+ *((volatile uint32_t *)user_req->completion_addr));
+ } else if ((cptres->s8x.compcode == CPT_8X_COMP_E_SWERR) ||
+ (cptres->s8x.compcode == CPT_8X_COMP_E_FAULT)) {
+ ret = (uint8_t)*user_req->alternate_caddr;
+ if (!ret)
+ ret = ERR_BAD_ALT_CCODE;
+ CPT_LOG_DP_DEBUG("Request %p : failed with %s : err code :"
+ "%x\n", user_req,
+ (cptres->s8x.compcode == CPT_8X_COMP_E_FAULT) ?
+ "DMA Fault" : "Software error", ret);
+ } else {
+ CPT_LOG_DP_ERR("Request %p : unexpected completion "
+ "code %d\n",
+ user_req, cptres->s8x.compcode);
+ ret = (uint8_t)*user_req->alternate_caddr;
+ }
+
+exit:
+ return ret;
}
#endif /* _OTX_CRYPTODEV_HW_ACCESS_H_ */
diff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.c
b/drivers/crypto/octeontx/otx_cryptodev_ops.c
index b20cbe0..d5d1285 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_ops.c
+++ b/drivers/crypto/octeontx/otx_cryptodev_ops.c
@@ -370,6 +370,51 @@ otx_cpt_pkt_enqueue(void *qptr, struct rte_crypto_op
**ops, uint16_t nb_ops)
return count;
}
+static uint16_t
+otx_cpt_pkt_dequeue(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
+{
+ struct cpt_instance *instance = (struct cpt_instance *)qptr;
+ struct cpt_vf *cptvf = (struct cpt_vf *)instance;
+ struct pending_queue *pqueue = &cptvf->pqueue;
+ uint16_t nb_completed, i = 0;
+ uint8_t compcode[nb_ops];
+
+ nb_completed = cpt_dequeue_burst(instance, nb_ops,
+ (void **)ops, compcode, pqueue);
+ while (likely(i < nb_completed)) {
+ struct rte_crypto_op *cop;
+ void *metabuf;
+ uintptr_t *rsp;
+ uint8_t status;
+
+ rsp = (void *)ops[i];
+ status = compcode[i];
+ if (likely((i + 1) < nb_completed))
+ rte_prefetch0(ops[i+1]);
+ metabuf = (void *)rsp[0];
+ cop = (void *)rsp[1];
+
+ ops[i] = cop;
+
+ if (likely(status == 0)) {
+ if (likely(!rsp[2]))
+ cop->status =
+ RTE_CRYPTO_OP_STATUS_SUCCESS;
+ else
+ compl_auth_verify(cop, (uint8_t *)rsp[2],
+ rsp[3]);
+ } else if (status == ERR_GC_ICV_MISCOMPARE) {
+ /*auth data mismatch */
+ cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
+ } else {
+ cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+ }
+ free_op_meta(metabuf, cptvf->meta_info.cptvf_meta_pool);
+ i++;
+ }
+ return nb_completed;
+}
+
static struct rte_cryptodev_ops cptvf_ops = {
/* Device related operations */
.dev_configure = otx_cpt_dev_config,
@@ -462,7 +507,7 @@ otx_cpt_dev_create(struct rte_cryptodev *c_dev)
c_dev->dev_ops = &cptvf_ops;
c_dev->enqueue_burst = otx_cpt_pkt_enqueue;
- c_dev->dequeue_burst = NULL;
+ c_dev->dequeue_burst = otx_cpt_pkt_dequeue;
c_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
RTE_CRYPTODEV_FF_HW_ACCELERATED |
--
2.7.4
