From: "Chen Jing D(Mark)" <jing.d.c...@intel.com>

I40E driver add function pointer to start/stop specific RX/TX queue.

Signed-off-by: Chen Jing D(Mark) <jing.d.chen at intel.com>
Reviewed-by: Konstantin Ananyev <konstantin.ananyev at intel.com>
Reviewed-by: Changchun Ouyang <changchun.ouyang at intel.com>
Reviewed-by: Huawei Xie <huawei.xie at intel.com>
---
 lib/librte_pmd_i40e/i40e_ethdev.c |    4 +
 lib/librte_pmd_i40e/i40e_rxtx.c   |  112 +++++++++++++++++++++++++++++++++++++
 lib/librte_pmd_i40e/i40e_rxtx.h   |    4 +
 3 files changed, 120 insertions(+), 0 deletions(-)

diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c 
b/lib/librte_pmd_i40e/i40e_ethdev.c
index 9ed31b5..81a1deb 100644
--- a/lib/librte_pmd_i40e/i40e_ethdev.c
+++ b/lib/librte_pmd_i40e/i40e_ethdev.c
@@ -232,6 +232,10 @@ static struct eth_dev_ops i40e_eth_dev_ops = {
        .vlan_offload_set             = i40e_vlan_offload_set,
        .vlan_strip_queue_set         = i40e_vlan_strip_queue_set,
        .vlan_pvid_set                = i40e_vlan_pvid_set,
+       .rx_queue_start               = i40e_dev_rx_queue_start,
+       .rx_queue_stop                = i40e_dev_rx_queue_stop,
+       .tx_queue_start               = i40e_dev_tx_queue_start,
+       .tx_queue_stop                = i40e_dev_tx_queue_stop,
        .rx_queue_setup               = i40e_dev_rx_queue_setup,
        .rx_queue_release             = i40e_dev_rx_queue_release,
        .rx_queue_count               = i40e_dev_rx_queue_count,
diff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c
index 83b9462..323c004 100644
--- a/lib/librte_pmd_i40e/i40e_rxtx.c
+++ b/lib/librte_pmd_i40e/i40e_rxtx.c
@@ -1429,6 +1429,118 @@ i40e_xmit_pkts_simple(void *tx_queue,
 }

 int
+i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
+{
+       struct i40e_vsi *vsi = I40E_DEV_PRIVATE_TO_VSI(dev->data->dev_private);
+       struct i40e_rx_queue *rxq;
+       int err = -1;
+       struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
+       uint16_t q_base = vsi->base_queue;
+
+       PMD_INIT_FUNC_TRACE();
+
+       if (rx_queue_id < dev->data->nb_rx_queues) {
+               rxq = dev->data->rx_queues[rx_queue_id];
+
+               err = i40e_alloc_rx_queue_mbufs(rxq);
+               if (err) {
+                       PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf\n");
+                       return err;
+               }
+
+               rte_wmb();
+
+               /* Init the RX tail regieter. */
+               I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
+
+               err = i40e_switch_rx_queue(hw, rx_queue_id + q_base, TRUE);
+
+               if (err) {
+                       PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on\n",
+                               rx_queue_id);
+
+                       i40e_rx_queue_release_mbufs(rxq);
+                       i40e_reset_rx_queue(rxq);
+               }
+       }
+
+       return err;
+}
+
+int
+i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
+{
+       struct i40e_vsi *vsi = I40E_DEV_PRIVATE_TO_VSI(dev->data->dev_private);
+       struct i40e_rx_queue *rxq;
+       int err;
+       struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
+       uint16_t q_base = vsi->base_queue;
+
+       if (rx_queue_id < dev->data->nb_rx_queues) {
+               rxq = dev->data->rx_queues[rx_queue_id];
+
+               err = i40e_switch_rx_queue(hw, rx_queue_id + q_base, FALSE);
+
+               if (err) {
+                       PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off\n",
+                               rx_queue_id);
+                       return err;
+               }
+               i40e_rx_queue_release_mbufs(rxq);
+               i40e_reset_rx_queue(rxq);
+       }
+
+       return 0;
+}
+
+int
+i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
+{
+       struct i40e_vsi *vsi = I40E_DEV_PRIVATE_TO_VSI(dev->data->dev_private);
+       int err = -1;
+       struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
+       uint16_t q_base = vsi->base_queue;
+
+       PMD_INIT_FUNC_TRACE();
+
+       if (tx_queue_id < dev->data->nb_tx_queues) {
+               err = i40e_switch_tx_queue(hw, tx_queue_id + q_base, TRUE);
+               if (err)
+                       PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on\n",
+                               tx_queue_id);
+       }
+
+       return err;
+}
+
+int
+i40e_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
+{
+       struct i40e_vsi *vsi = I40E_DEV_PRIVATE_TO_VSI(dev->data->dev_private);
+       struct i40e_tx_queue *txq;
+       int err;
+       struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
+       uint16_t q_base = vsi->base_queue;
+
+       if (tx_queue_id < dev->data->nb_tx_queues) {
+               txq = dev->data->tx_queues[tx_queue_id];
+
+               err = i40e_switch_tx_queue(hw, tx_queue_id + q_base, FALSE);
+
+               if (err) {
+                       PMD_DRV_LOG(ERR, "Failed to switch TX queue %u of\n",
+                               tx_queue_id);
+                       return err;
+               }
+
+               i40e_tx_queue_release_mbufs(txq);
+               i40e_reset_tx_queue(txq);
+       }
+
+       return 0;
+}
+
+int
 i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
                        uint16_t queue_idx,
                        uint16_t nb_desc,
diff --git a/lib/librte_pmd_i40e/i40e_rxtx.h b/lib/librte_pmd_i40e/i40e_rxtx.h
index 6db2faf..b67b4b3 100644
--- a/lib/librte_pmd_i40e/i40e_rxtx.h
+++ b/lib/librte_pmd_i40e/i40e_rxtx.h
@@ -152,6 +152,10 @@ struct i40e_tx_queue {
        bool q_set; /**< indicate if tx queue has been configured */
 };

+int i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
+int i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
+int i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
+int i40e_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 int i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
                            uint16_t queue_idx,
                            uint16_t nb_desc,
-- 
1.7.7.6

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