> -----Message d'origine----- > De?: Thomas Monjalon [mailto:thomas.monjalon at 6wind.com] > Envoy??: vendredi 20 d?cembre 2013 16:39 > ??: Fran?ois-Fr?d?ric Ozog > Cc?: dev at dpdk.org > Objet?: Re: [dpdk-dev] Bit spinlocks in DPDK > > Hello, > > 07/12/2013 18:54, Fran?ois-Fr?d?ric Ozog : > > 1) If the critical section deals with weakly ordered loads then > > explicit fencing MUST be used: if not, out of order execution will > > just kill your idea of critical section. > [...] > > So use rte_mb() or rte_wmb() or rte_rmb() where appropriate. I > > recommend the rte_unlock code and documentation explains the out of > > order execution issues and the conditions they have to be mitigated > > with rte*mb(). I wonder if having an explicit mfence in > > rte_sinlock_unlock wouldn't be just necessary to avoid "hairy" bugs. > > In addition, we would have rte_sinlock_unlock_no_mb used internally > > for performance reasons, and usable externally by advanced users. > > Using lock prefix is lighter than using memory barrier and have the same > effects.
Well, in general yes BUT Intel states "../.. locked operations serialize all outstanding load and store operations ../.. with one exception. Load operations that reference weakly ordered memory types (such as the WC memory type) may *not* be serialized" in 8.1.2.2 Software Controlled Bus Locking; particularly if streaming loads are used (may happen on certain devices memory mapped I/O accesses and the compiler generating streaming loads). So this comment is essentially for the PMD writers: use the fencing where appropriate, even if the lock prefix is there. As I will be the one forgetting the rule, I like to have that in the documentation/comments as reminders to keep things neat. Fran?ois-Fr?d?ric > But you're right about the bug in spinlocks. > I am going to send a patch for this. > > -- > Thomas
