Hello folks, I am working at Inaccel where we utilize FPGAs to accelerate machine learning workloads . Recently, we wanted to integrate our platform with Arrow and we stumbled upon the non-alignment of data-buffers to page boundaries (4KB). We implemented the option to supply per-column metadata to page-align column vectors and we later memory mapped those columns using native mmap() calls. Accelerators leverage page-alignment to i/o efficiently, thus such an option might be an interesting addition to the project. In case you are interested, I will create a PR.
Dimitris