The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=8178a4e3c13241804bb9625b2ef4c1b3fea3c7d9
commit 8178a4e3c13241804bb9625b2ef4c1b3fea3c7d9 Author: Andrew Turner <[email protected]> AuthorDate: 2025-11-18 18:00:31 +0000 Commit: Andrew Turner <[email protected]> CommitDate: 2025-11-18 18:00:31 +0000 arm/gic: Make GICV3_IVAR_SUPPORT_LPIS generic GICv5 will need this too, so move to the GIC_IVAR namespace. Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D53663 --- sys/arm/arm/gic.c | 3 +++ sys/arm/arm/gic_common.h | 2 ++ sys/arm64/arm64/gic_v3.c | 1 + 3 files changed, 6 insertions(+) diff --git a/sys/arm/arm/gic.c b/sys/arm/arm/gic.c index aca4410bf523..c1b2cf626ed8 100644 --- a/sys/arm/arm/gic.c +++ b/sys/arm/arm/gic.c @@ -517,6 +517,9 @@ arm_gic_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) case GIC_IVAR_VGIC: *result = 0; return (0); + case GIC_IVAR_SUPPORT_LPIS: + *result = false; + return (0); } return (ENOENT); diff --git a/sys/arm/arm/gic_common.h b/sys/arm/arm/gic_common.h index c45832ec1782..c2d1b1340b9b 100644 --- a/sys/arm/arm/gic_common.h +++ b/sys/arm/arm/gic_common.h @@ -38,6 +38,7 @@ struct arm_gic_range { #define GIC_IVAR_HW_REV 500 #define GIC_IVAR_BUS 501 #define GIC_IVAR_VGIC 502 +#define GIC_IVAR_SUPPORT_LPIS 503 /* GIC_IVAR_BUS values */ #define GIC_BUS_UNKNOWN 0 @@ -48,6 +49,7 @@ struct arm_gic_range { __BUS_ACCESSOR(gic, hw_rev, GIC, HW_REV, u_int); __BUS_ACCESSOR(gic, bus, GIC, BUS, u_int); __BUS_ACCESSOR(gic, vgic, GIC, VGIC, u_int); +__BUS_ACCESSOR(gic, support_lpis, GIC, SUPPORT_LPIS, bool); /* Software Generated Interrupts */ #define GIC_FIRST_SGI 0 /* Irqs 0-15 are SGIs/IPIs. */ diff --git a/sys/arm64/arm64/gic_v3.c b/sys/arm64/arm64/gic_v3.c index 201cdae6de09..43743ba588f5 100644 --- a/sys/arm64/arm64/gic_v3.c +++ b/sys/arm64/arm64/gic_v3.c @@ -494,6 +494,7 @@ gic_v3_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) case GICV3_IVAR_REDIST: *result = (uintptr_t)&sc->gic_redists.pcpu[PCPU_GET(cpuid)]; return (0); + case GIC_IVAR_SUPPORT_LPIS: case GICV3_IVAR_SUPPORT_LPIS: *result = (gic_d_read(sc, 4, GICD_TYPER) & GICD_TYPER_LPIS) != 0;
