The branch main has been updated by markj:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=4a8e62a1209f7d7529817c4c27b91fb97750b7b2

commit 4a8e62a1209f7d7529817c4c27b91fb97750b7b2
Author:     Mark Johnston <ma...@freebsd.org>
AuthorDate: 2025-08-01 09:29:21 +0000
Commit:     Mark Johnston <ma...@freebsd.org>
CommitDate: 2025-08-04 12:44:05 +0000

    qat: Revert changes to BAR indices
    
    It is not clear how commit ded037e65e52 could reasonably change BAR
    indices, and doing so broke at least the C3000 driver.  Revert that part
    of the change.
    
    Reported by:    kp
    Reviewed by:    kp, Haresh Sankar Raj <hareshx.sankar....@intel.com>
    MFC after:      3 days
    Fixes:          ded037e65e52 ("qat: driver updates to improve code and fix 
bugs")
    Differential Revision:  https://reviews.freebsd.org/D51664
---
 sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h | 4 ++--
 sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h 
b/sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
index a7324509bea7..f8adc0dba935 100644
--- a/sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
+++ b/sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
@@ -4,8 +4,8 @@
 #define ADF_200XX_HW_DATA_H_
 
 /* PCIe configuration space */
-#define ADF_200XX_PMISC_BAR 1
-#define ADF_200XX_ETR_BAR 2
+#define ADF_200XX_PMISC_BAR 0
+#define ADF_200XX_ETR_BAR 1
 #define ADF_200XX_RX_RINGS_OFFSET 8
 #define ADF_200XX_TX_RINGS_MASK 0xFF
 #define ADF_200XX_MAX_ACCELERATORS 3
diff --git a/sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h 
b/sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
index cddfc3f84853..486c46a1cac7 100644
--- a/sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
+++ b/sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
@@ -4,8 +4,8 @@
 #define ADF_C3XXX_HW_DATA_H_
 
 /* PCIe configuration space */
-#define ADF_C3XXX_PMISC_BAR 1
-#define ADF_C3XXX_ETR_BAR 2
+#define ADF_C3XXX_PMISC_BAR 0
+#define ADF_C3XXX_ETR_BAR 1
 #define ADF_C3XXX_RX_RINGS_OFFSET 8
 #define ADF_C3XXX_TX_RINGS_MASK 0xFF
 #define ADF_C3XXX_MAX_ACCELERATORS 3

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