The branch main has been updated by kib:
URL:
https://cgit.FreeBSD.org/src/commit/?id=c3555174fd97ce12682e5ed1e2d2586016962a8f
commit c3555174fd97ce12682e5ed1e2d2586016962a8f
Author: Konstantin Belousov <k...@freebsd.org>
AuthorDate: 2025-02-05 03:05:35 +0000
Commit: Konstantin Belousov <k...@freebsd.org>
CommitDate: 2025-03-13 15:59:27 +0000
mlx5en: follow PRM for setting the max hw lro segment size
If the NIC is capable, just pass the full packet size, including L2/L3
headers, as the segment size. Otherwise, decrement the number of
strides by 1 to left the space for L2/IP headers, as it was done before.
But do the arithmetic on the segment number instead of the full packet
size.
Reviewed by: Ariel Ehrenberg <aehrenb...@nvidia.com>, Slava Shwartsman
<slav...@nvidia.com>
Sponsored by: NVidia networking
MFC after: 1 week
---
sys/dev/mlx5/mlx5_en/mlx5_en_main.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c
b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c
index 321ed8ac9976..d69d2e433c9c 100644
--- a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c
+++ b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c
@@ -2947,10 +2947,8 @@ mlx5e_get_rss_key(void *key_ptr)
static void
mlx5e_hw_lro_set_tir_ctx_lro_max_msg_sz(struct mlx5e_priv *priv, u32 *tirc)
{
-#define ROUGH_MAX_L2_L3_HDR_SZ 256
-
- MLX5_SET(tirc, tirc, lro_max_msg_sz, (priv->params.lro_wqe_sz -
- ROUGH_MAX_L2_L3_HDR_SZ) >> 8);
+ MLX5_SET(tirc, tirc, lro_max_msg_sz, (priv->params.lro_wqe_sz >> 8) -
+ (MLX5_CAP_ETH(priv->mdev, lro_max_msg_sz_mode) == 0 ? 1 : 0));
}
static void
