The branch main has been updated by kib:
URL:
https://cgit.FreeBSD.org/src/commit/?id=29a9d7c6ce78825251ea127ade445236607b0b81
commit 29a9d7c6ce78825251ea127ade445236607b0b81
Author: Ariel Ehrenberg <aehrenb...@nvidia.com>
AuthorDate: 2024-11-12 09:16:26 +0000
Commit: Konstantin Belousov <k...@freebsd.org>
CommitDate: 2024-12-15 22:27:31 +0000
mlx5_core: fix panic on sriov enablement
Align the code of fdb steering with flow steering core
and add missing parts in namespace initialization and
in prio logic
PR: 281714
Sponsored by: NVidia networking
---
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c | 18 +++++++++++-------
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c | 8 ++++++++
sys/dev/mlx5/mlx5_ifc.h | 8 --------
3 files changed, 19 insertions(+), 15 deletions(-)
diff --git a/sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
b/sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
index a7bff68b68e6..8c96beeb509f 100644
--- a/sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
+++ b/sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
@@ -218,7 +218,7 @@ static int modify_esw_vport_cvlan(struct mlx5_core_dev
*dev, u32 vport,
static struct mlx5_flow_handle *
esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8 mac[ETH_ALEN], u32 vport)
{
- struct mlx5_flow_destination dest;
+ struct mlx5_flow_destination dest = {};
struct mlx5_flow_handle *flow_rule = NULL;
struct mlx5_flow_act flow_act = {};
struct mlx5_flow_spec *spec;
@@ -240,13 +240,13 @@ esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8
mac[ETH_ALEN], u32 vport)
/* Match criteria mask */
memset(dmac_c, 0xff, 6);
- dest.type = MLX5_FLOW_CONTEXT_DEST_TYPE_VPORT;
+ dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
dest.vport.num = vport;
esw_debug(esw->dev,
"\tFDB add rule dmac_v(%pM) dmac_c(%pM) -> vport(%d)\n",
dmac_v, dmac_c, vport);
- flow_act.action = MLX5_FLOW_RULE_FWD_ACTION_DEST;
+ flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
flow_rule =
mlx5_add_flow_rules(esw->fdb_table.fdb, spec,
&flow_act, &dest, 1);
@@ -290,7 +290,7 @@ static int esw_create_fdb_table(struct mlx5_eswitch *esw)
/* (-2) Since MaorG said so .. */
table_size = BIT(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size)) - 2;
- ft_attr.prio = 0;
+ ft_attr.prio = FDB_SLOW_PATH;
ft_attr.max_fte = table_size;
fdb = mlx5_create_flow_table(root_ns, &ft_attr);
if (IS_ERR_OR_NULL(fdb)) {
@@ -616,7 +616,7 @@ static void esw_vport_enable_egress_acl(struct mlx5_eswitch
*esw,
esw_debug(dev, "Create vport[%d] egress ACL log_max_size(%d)\n",
vport->vport, MLX5_CAP_ESW_EGRESS_ACL(dev, log_max_ft_size));
- root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_EGRESS);
+ root_ns = mlx5_get_flow_vport_acl_namespace(dev,
MLX5_FLOW_NAMESPACE_ESW_EGRESS, vport->vport);
if (!root_ns) {
esw_warn(dev, "Failed to get E-Switch egress flow namespace\n");
return;
@@ -627,6 +627,8 @@ static void esw_vport_enable_egress_acl(struct mlx5_eswitch
*esw,
return;
ft_attr.max_fte = table_size;
+ if (vport->vport)
+ ft_attr.flags = MLX5_FLOW_TABLE_OTHER_VPORT;
acl = mlx5_create_vport_flow_table(root_ns, &ft_attr, vport->vport);
if (IS_ERR_OR_NULL(acl)) {
err = PTR_ERR(acl);
@@ -716,7 +718,7 @@ static void esw_vport_enable_ingress_acl(struct
mlx5_eswitch *esw,
esw_debug(dev, "Create vport[%d] ingress ACL log_max_size(%d)\n",
vport->vport, MLX5_CAP_ESW_INGRESS_ACL(dev, log_max_ft_size));
- root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_INGRESS);
+ root_ns = mlx5_get_flow_vport_acl_namespace(dev,
MLX5_FLOW_NAMESPACE_ESW_INGRESS, vport->vport);
if (!root_ns) {
esw_warn(dev, "Failed to get E-Switch ingress flow
namespace\n");
return;
@@ -727,6 +729,8 @@ static void esw_vport_enable_ingress_acl(struct
mlx5_eswitch *esw,
return;
ft_attr.max_fte = table_size;
+ if (vport->vport)
+ ft_attr.flags = MLX5_FLOW_TABLE_OTHER_VPORT;
acl = mlx5_create_vport_flow_table(root_ns, &ft_attr, vport->vport);
if (IS_ERR_OR_NULL(acl)) {
err = PTR_ERR(acl);
@@ -1004,7 +1008,7 @@ int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw,
int nvfs)
esw_warn(esw->dev, "E-Switch ingress ACL is not supported by
FW\n");
if (!MLX5_CAP_ESW_EGRESS_ACL(esw->dev, ft_support))
- esw_warn(esw->dev, "E-Switch engress ACL is not supported by
FW\n");
+ esw_warn(esw->dev, "E-Switch egress ACL is not supported by
FW\n");
esw_info(esw->dev, "E-Switch enable SRIOV: nvfs(%d)\n", nvfs);
diff --git a/sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
b/sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
index 1a058e0bf711..8d93d4740462 100644
--- a/sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
+++ b/sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
@@ -144,6 +144,8 @@
#define KERNEL_TX_MACSEC_NUM_LEVELS 2
#define KERNEL_TX_MACSEC_MIN_LEVEL (KERNEL_TX_IPSEC_MIN_LEVEL +
KERNEL_TX_MACSEC_NUM_PRIOS)
+#define MAX_VPORTS 128
+
struct node_caps {
size_t arr_sz;
long *caps;
@@ -3184,6 +3186,12 @@ int mlx5_fs_core_init(struct mlx5_core_dev *dev)
if (err)
goto err;
}
+ err = mlx5_fs_egress_acls_init(dev, MAX_VPORTS);
+ if (err)
+ goto err;
+ err = mlx5_fs_ingress_acls_init(dev, MAX_VPORTS);
+ if (err)
+ goto err;
}
if (MLX5_CAP_FLOWTABLE_SNIFFER_RX(dev, ft_support)) {
diff --git a/sys/dev/mlx5/mlx5_ifc.h b/sys/dev/mlx5/mlx5_ifc.h
index 20deb783f174..3f75acd250da 100644
--- a/sys/dev/mlx5/mlx5_ifc.h
+++ b/sys/dev/mlx5/mlx5_ifc.h
@@ -555,14 +555,6 @@ struct mlx5_ifc_flow_counter_list_bits {
u8 reserved_1[0x20];
};
-enum {
- MLX5_FLOW_CONTEXT_DEST_TYPE_VPORT = 0x0,
- MLX5_FLOW_CONTEXT_DEST_TYPE_FLOW_TABLE = 0x1,
- MLX5_FLOW_CONTEXT_DEST_TYPE_TIR = 0x2,
- MLX5_FLOW_CONTEXT_DEST_TYPE_QP = 0x3,
- MLX5_FLOW_CONTEXT_DEST_TYPE_TABLE_TYPE = 0xA,
-};
-
struct mlx5_ifc_dest_format_struct_bits {
u8 destination_type[0x8];
u8 destination_id[0x18];
