The branch main has been updated by andrew:
URL:
https://cgit.FreeBSD.org/src/commit/?id=e7bc16422031803823fd6ef0c5083631dc7dfffc
commit e7bc16422031803823fd6ef0c5083631dc7dfffc
Author: Andrew Turner <and...@freebsd.org>
AuthorDate: 2024-12-11 15:49:15 +0000
Commit: Andrew Turner <and...@freebsd.org>
CommitDate: 2024-12-11 17:02:24 +0000
arm64: Add a DBM errata workaround
Add a workaround for Cortex-A55 erratum 1024718 and Cortex-A510 erratum
2051678. Both errata are related to the hardware handling of the dirty
field in page tables and can be worked around by disabling this feature.
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D47809
---
sys/arm64/arm64/pmap.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/sys/arm64/arm64/pmap.c b/sys/arm64/arm64/pmap.c
index b8f519388977..fd6798668626 100644
--- a/sys/arm64/arm64/pmap.c
+++ b/sys/arm64/arm64/pmap.c
@@ -1629,10 +1629,24 @@ void
pmap_cpu_init(void)
{
uint64_t id_aa64mmfr1, tcr;
+ bool enable_dbm;
+
+ enable_dbm = false;
/* Enable HAFDBS if supported */
id_aa64mmfr1 = READ_SPECIALREG(id_aa64mmfr1_el1);
- if (ID_AA64MMFR1_HAFDBS_VAL(id_aa64mmfr1) >=ID_AA64MMFR1_HAFDBS_AF_DBS){
+ if (ID_AA64MMFR1_HAFDBS_VAL(id_aa64mmfr1) >= ID_AA64MMFR1_HAFDBS_AF_DBS)
+ enable_dbm = true;
+ /* Disable on Cortex-A55 for erratum 1024718 - all revisions */
+ if (CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK, CPU_IMPL_ARM,
+ CPU_PART_CORTEX_A55, 0, 0))
+ enable_dbm = false;
+ /* Disable on Cortex-A510 for erratum 2051678 - r0p0 to r0p2 */
+ else if (CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK | CPU_VAR_MASK,
+ CPU_IMPL_ARM, CPU_PART_CORTEX_A510, 0, 0))
+ if (CPU_REV(PCPU_GET(midr)) < 3)
+ enable_dbm = false;
+ if (enable_dbm) {
tcr = READ_SPECIALREG(tcr_el1) | TCR_HD;
WRITE_SPECIALREG(tcr_el1, tcr);
isb();
