The branch main has been updated by kbowling:
URL:
https://cgit.FreeBSD.org/src/commit/?id=cbcab907f8ad1a4ac38dbc574c747ac2901faa54
commit cbcab907f8ad1a4ac38dbc574c747ac2901faa54
Author: Kevin Bowling <kbowl...@freebsd.org>
AuthorDate: 2023-07-27 22:50:32 +0000
Commit: Kevin Bowling <kbowl...@freebsd.org>
CommitDate: 2023-07-27 22:58:05 +0000
e1000: Corrections for lem(4)/em(4) txcsum offload
Explicitly set ipcss/ipcse/ipcso for IPv6 per intel SDM as indicated in
inline comments.
Fix and consolidate 82543/82547 hwcsum exemption.
While here rearrange and expand some commentary.
---
sys/dev/e1000/em_txrx.c | 37 +++++++++++++++++++++++--------------
sys/dev/e1000/if_em.c | 11 ++++-------
2 files changed, 27 insertions(+), 21 deletions(-)
diff --git a/sys/dev/e1000/em_txrx.c b/sys/dev/e1000/em_txrx.c
index 8b1d2817490f..0e433f388ac5 100644
--- a/sys/dev/e1000/em_txrx.c
+++ b/sys/dev/e1000/em_txrx.c
@@ -186,7 +186,7 @@ em_tso_setup(struct e1000_softc *sc, if_pkt_info_t pi,
uint32_t *txd_upper,
TXD->tcp_seg_setup.fields.hdr_len = hdr_len;
/*
- * 8254x SDM4.0 page 45, and PCIe GbE SDM2.5 page 63
+ * "PCI/PCI-X SDM 4.0" page 45, and "PCIe GbE SDM 2.5" page 63
* - Set up basic TUCMDs
* - Enable IP bit on 82544
* - For others IP bit on indicates IPv4, while off indicates IPv6
@@ -212,10 +212,6 @@ em_tso_setup(struct e1000_softc *sc, if_pkt_info_t pi,
uint32_t *txd_upper,
return (cur);
}
-#define TSO_WORKAROUND 4
-#define DONT_FORCE_CTX 1
-
-
/*********************************************************************
* The offload context is protocol specific (TCP/UDP) and thus
* only needs to be set when the protocol changes. The occasion
@@ -232,6 +228,7 @@ em_tso_setup(struct e1000_softc *sc, if_pkt_info_t pi,
uint32_t *txd_upper,
* in turn greatly slow down performance to send small sized
* frames.
**********************************************************************/
+#define DONT_FORCE_CTX 1
static int
em_transmit_checksum_setup(struct e1000_softc *sc, if_pkt_info_t pi,
@@ -271,20 +268,30 @@ em_transmit_checksum_setup(struct e1000_softc *sc,
if_pkt_info_t pi,
}
TXD = (struct e1000_context_desc *)&txr->tx_base[cur];
+ /*
+ * ipcss - Start offset for header checksum calculation.
+ * ipcse - End offset for header checksum calculation.
+ * ipcso - Offset of place to put the checksum.
+ *
+ * We set ipcsX values regardless of IP version to work around HW issues
+ * and ipcse must be 0 for IPv6 per "PCIe GbE SDM 2.5" page 61.
+ * IXSM controls whether it's inserted.
+ */
+ TXD->lower_setup.ip_fields.ipcss = pi->ipi_ehdrlen;
+ TXD->lower_setup.ip_fields.ipcso = pi->ipi_ehdrlen +
+ offsetof(struct ip, ip_sum);
if (csum_flags & CSUM_IP) {
*txd_upper |= E1000_TXD_POPTS_IXSM << 8;
- /*
- * Start offset for header checksum calculation.
- * End offset for header checksum calculation.
- * Offset of place to put the checksum.
- */
- TXD->lower_setup.ip_fields.ipcss = pi->ipi_ehdrlen;
TXD->lower_setup.ip_fields.ipcse = htole16(hdr_len);
- TXD->lower_setup.ip_fields.ipcso = pi->ipi_ehdrlen +
- offsetof(struct ip, ip_sum);
cmd |= E1000_TXD_CMD_IP;
- }
+ } else if (csum_flags & (CSUM_IP6_TCP | CSUM_IP6_UDP))
+ TXD->lower_setup.ip_fields.ipcse = htole16(0);
+ /*
+ * tucss - Start offset for payload checksum calculation.
+ * tucse - End offset for payload checksum calculation.
+ * tucso - Offset of place to put the checksum.
+ */
if (csum_flags & (CSUM_TCP | CSUM_UDP | CSUM_IP6_TCP | CSUM_IP6_UDP)) {
uint8_t tucso;
@@ -320,6 +327,8 @@ em_transmit_checksum_setup(struct e1000_softc *sc,
if_pkt_info_t pi,
return (cur);
}
+#define TSO_WORKAROUND 4 /* TSO sentinel descriptor */
+
static int
em_isc_txd_encap(void *arg, if_pkt_info_t pi)
{
diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c
index 0da1f0a2dc67..32d8c3282e33 100644
--- a/sys/dev/e1000/if_em.c
+++ b/sys/dev/e1000/if_em.c
@@ -948,15 +948,13 @@ em_if_attach_pre(if_ctx_t ctx)
scctx->isc_tx_csum_flags = CSUM_TCP | CSUM_UDP | CSUM_IP_TSO |
CSUM_IP6_TCP | CSUM_IP6_UDP;
- /* 8254x SDM4.0 page 33 - FDX requirement on these chips */
- if (hw->mac.type == e1000_82547 || hw->mac.type ==
e1000_82547_rev_2)
+ /* "PCI/PCI-X SDM 4.0" page 33 (b) - FDX requirement on these
chips */
+ if (hw->mac.type < e1000_82543 || hw->mac.type == e1000_82547 ||
+ hw->mac.type == e1000_82547_rev_2)
scctx->isc_capenable &=
~(IFCAP_HWCSUM|IFCAP_VLAN_HWCSUM);
-
- if (hw->mac.type < e1000_82543)
- scctx->isc_capabilities &=
~(IFCAP_HWCSUM|IFCAP_VLAN_HWCSUM);
/* 82541ER doesn't do HW tagging */
if (hw->device_id == E1000_DEV_ID_82541ER || hw->device_id ==
E1000_DEV_ID_82541ER_LOM)
- scctx->isc_capabilities &= ~IFCAP_VLAN_HWTAGGING;
+ scctx->isc_capenable &= ~IFCAP_VLAN_HWTAGGING;
/* INTx only */
scctx->isc_msix_bar = 0;
}
@@ -1352,7 +1350,6 @@ em_if_init(if_ctx_t ctx)
E1000_RAR_ENTRIES - 1);
}
-
/* Initialize the hardware */
em_reset(ctx);
em_if_update_admin_status(ctx);
