The branch main has been updated by scottph:
URL:
https://cgit.FreeBSD.org/src/commit/?id=a693a30038278b1ccd3e67b98d76e259ca1b405d
commit a693a30038278b1ccd3e67b98d76e259ca1b405d
Author: D Scott Phillips <scot...@freebsd.org>
AuthorDate: 2022-03-25 16:04:11 +0000
Commit: D Scott Phillips <scot...@freebsd.org>
CommitDate: 2022-03-25 16:49:33 +0000
arm64: pmap: Mask VA operand in TLBI instructions
Bits 43:0 of the TLBI operand are bits 55:12 of the VA. Leaving
bits 63:55 of the VA in bits 51:44 of the operand might wind up
setting the TTL field (47:44) and accidentally restricting which
translation levels are flushed in the TLB.
Reviewed By: andrew
MFC after: 3 days
Sponsored by: Ampere Computing
Differential Revision: https://reviews.freebsd.org/D34664
---
sys/arm64/arm64/pmap.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sys/arm64/arm64/pmap.c b/sys/arm64/arm64/pmap.c
index 0ab27e0a7b53..9776c36b3ef4 100644
--- a/sys/arm64/arm64/pmap.c
+++ b/sys/arm64/arm64/pmap.c
@@ -361,7 +361,8 @@ void (*pmap_invalidate_vpipt_icache)(void);
#define COOKIE_TO_EPOCH(cookie) ((int)((u_long)(cookie) >> 32))
#define TLBI_VA_SHIFT 12
-#define TLBI_VA(addr) ((addr) >> TLBI_VA_SHIFT)
+#define TLBI_VA_MASK ((1ul << 44) - 1)
+#define TLBI_VA(addr) (((addr) >> TLBI_VA_SHIFT) &
TLBI_VA_MASK)
#define TLBI_VA_L3_INCR (L3_SIZE >> TLBI_VA_SHIFT)
static int superpages_enabled = 1;
