The branch main has been updated by mav:
URL:
https://cgit.FreeBSD.org/src/commit/?id=5a49f1914178c5275105f2ab0d23a98118cd585f
commit 5a49f1914178c5275105f2ab0d23a98118cd585f
Author: Alexander Motin <m...@freebsd.org>
AuthorDate: 2021-07-28 20:15:43 +0000
Commit: Alexander Motin <m...@freebsd.org>
CommitDate: 2021-07-28 20:38:01 +0000
Do not expose to scheduler caches of single CPU.
Before this change my dual-Xeon(R) Gold 6242R always reported 3 levels
or topology (root, package/L3 and core/L2). But with SMT disabled
core/L2 matches thread, so additional topology level only causes more
traversal work. With this change SMT case is reported same as before,
while non-SMT is reported with only 2 much more simple levels.
MFC after: 2 weeks
---
sys/x86/x86/mp_x86.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/sys/x86/x86/mp_x86.c b/sys/x86/x86/mp_x86.c
index c98ac12a7c3f..0698cb51b2d0 100644
--- a/sys/x86/x86/mp_x86.c
+++ b/sys/x86/x86/mp_x86.c
@@ -829,6 +829,12 @@ x86topo_add_sched_group(struct topo_node *root, struct
cpu_group *cg_root)
node = topo_next_nonchild_node(root, node);
}
+ /*
+ * We are not interested in nodes including only one CPU each.
+ */
+ if (nchildren == root->cpu_count)
+ return;
+
cg_root->cg_child = smp_topo_alloc(nchildren);
cg_root->cg_children = nchildren;
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