The branch main has been updated by markj:
URL:
https://cgit.FreeBSD.org/src/commit/?id=4bb929cc6d60aed8910ab02c32a7e1bd3fdfa298
commit 4bb929cc6d60aed8910ab02c32a7e1bd3fdfa298
Author: Mark Johnston <ma...@freebsd.org>
AuthorDate: 2024-04-03 17:43:48 +0000
Commit: Mark Johnston <ma...@freebsd.org>
CommitDate: 2024-04-10 15:17:56 +0000
bhyve: Partially disable INT#x support in virtio for arm64
A FreeBSD guest won't make use of this support and pci_lintr_* is not
implemented on arm64. Simply make pci_lintr_*() calls amd64-specific
for now.
Reviewed by: corvink, jhb
MFC after: 2 weeks
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D41741
---
usr.sbin/bhyve/virtio.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/usr.sbin/bhyve/virtio.c b/usr.sbin/bhyve/virtio.c
index 26df39ceb5b3..eb09714d4f20 100644
--- a/usr.sbin/bhyve/virtio.c
+++ b/usr.sbin/bhyve/virtio.c
@@ -114,8 +114,10 @@ vi_reset_dev(struct virtio_softc *vs)
vs->vs_negotiated_caps = 0;
vs->vs_curq = 0;
/* vs->vs_status = 0; -- redundant */
+#ifdef __amd64__
if (vs->vs_isr)
pci_lintr_deassert(vs->vs_pi);
+#endif
vs->vs_isr = 0;
vs->vs_msix_cfg_idx = VIRTIO_MSI_NO_VECTOR;
}
@@ -162,8 +164,11 @@ vi_intr_init(struct virtio_softc *vs, int barnum, int
use_msix)
/* Only 1 MSI vector for bhyve */
pci_emul_add_msicap(vs->vs_pi, 1);
+ /* XXX-MJ missing an implementation for arm64 */
+#ifdef __amd64__
/* Legacy interrupts are mandatory for virtio devices */
pci_lintr_request(vs->vs_pi);
+#endif
return (0);
}
@@ -651,8 +656,10 @@ bad:
case VIRTIO_PCI_ISR:
value = vs->vs_isr;
vs->vs_isr = 0; /* a read clears this flag */
+#ifdef __amd64__
if (value)
pci_lintr_deassert(pi);
+#endif
break;
case VIRTIO_MSI_CONFIG_VECTOR:
value = vs->vs_msix_cfg_idx;
