The branch stable/13 has been updated by markj:
URL:
https://cgit.FreeBSD.org/src/commit/?id=f0122974fba0cee78e8bd86351803d855ce85758
commit f0122974fba0cee78e8bd86351803d855ce85758
Author: Akio Morita <akio.mor...@kek.jp>
AuthorDate: 2023-08-01 20:32:12 +0000
Commit: Mark Johnston <ma...@freebsd.org>
CommitDate: 2024-01-30 14:26:29 +0000
amdsmn(4), amdtemp(4): add support for Zen 4
Zen 4 support, tested on Ryzen 9 7900
Reviewed by: imp (previous version), mhorne
Approved by: mhorne
Obtained from: http://jyurai.ddo.jp/~amorita/diary/?date=20221102#p01
Differential Revision: https://reviews.freebsd.org/D41049
(cherry picked from commit 323a94afb6236bcec3a07721566aec6f2ea2b209)
---
sys/dev/amdsmn/amdsmn.c | 7 +++++++
sys/dev/amdtemp/amdtemp.c | 17 +++++++++++++++--
2 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/sys/dev/amdsmn/amdsmn.c b/sys/dev/amdsmn/amdsmn.c
index c38a549756c5..7737a3c3fa4c 100644
--- a/sys/dev/amdsmn/amdsmn.c
+++ b/sys/dev/amdsmn/amdsmn.c
@@ -59,6 +59,7 @@
#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480 /* Also M70H,
F19H M00H/M20H */
#define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
+#define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
struct pciid;
struct amdsmn_softc {
@@ -102,6 +103,12 @@ static const struct pciid {
.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
.amdsmn_data_reg = F17H_SMN_DATA_REG,
},
+ {
+ .amdsmn_vendorid = CPU_VENDOR_AMD,
+ .amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M60H_ROOT,
+ .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+ .amdsmn_data_reg = F17H_SMN_DATA_REG,
+ },
};
/*
diff --git a/sys/dev/amdtemp/amdtemp.c b/sys/dev/amdtemp/amdtemp.c
index 2ead5ba96cf5..2fdecead6c0f 100644
--- a/sys/dev/amdtemp/amdtemp.c
+++ b/sys/dev/amdtemp/amdtemp.c
@@ -82,6 +82,7 @@ struct amdtemp_softc {
#define AMDTEMP_FLAG_CT_10BIT 0x02 /* CurTmp is 10-bit wide. */
#define AMDTEMP_FLAG_ALT_OFFSET 0x04 /* CurTmp starts at -28C. */
int32_t sc_offset;
+ int32_t sc_temp_base;
int32_t (*sc_gettemp)(device_t, amdsensor_t);
struct sysctl_oid *sc_sysctl_cpu[MAXCPU];
struct intr_config_hook sc_ich;
@@ -109,6 +110,7 @@ struct amdtemp_softc {
#define DEVICEID_AMD_HOSTB17H_M10H_ROOT 0x15d0
#define DEVICEID_AMD_HOSTB17H_M30H_ROOT 0x1480 /* Also M70H, F19H
M00H/M20H */
#define DEVICEID_AMD_HOSTB17H_M60H_ROOT 0x1630
+#define DEVICEID_AMD_HOSTB19H_M60H_ROOT 0x14d8
static const struct amdtemp_product {
uint16_t amdtemp_vendorid;
@@ -133,6 +135,7 @@ static const struct amdtemp_product {
{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M10H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M30H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M60H_ROOT, false },
+ { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M60H_ROOT, false },
};
/*
@@ -178,6 +181,8 @@ static const struct amdtemp_product {
#define AMDTEMP_17H_CCD_TMP_BASE 0x59954
#define AMDTEMP_17H_CCD_TMP_VALID (1u << 11)
+#define AMDTEMP_ZEN4_CCD_TMP_BASE 0x59b08
+
/*
* AMD temperature range adjustment, in deciKelvins (i.e., 49.0 Celsius).
*/
@@ -519,6 +524,8 @@ amdtemp_attach(device_t dev)
dev, CORE0_SENSOR0, amdtemp_sysctl, "IK",
"Core 0 / Sensor 0 temperature");
+ sc->sc_temp_base = AMDTEMP_17H_CCD_TMP_BASE;
+
if (family == 0x17)
amdtemp_probe_ccd_sensors17h(dev, model);
else if (family == 0x19)
@@ -780,7 +787,7 @@ amdtemp_gettemp17h(device_t dev, amdsensor_t sensor)
return (amdtemp_decode_fam17h_tctl(sc->sc_offset, val));
case CCD_BASE ... CCD_MAX:
/* Tccd<N> */
- error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CCD_TMP_BASE +
+ error = amdsmn_read(sc->sc_smn, sc->sc_temp_base +
(((int)sensor - CCD_BASE) * sizeof(val)), &val);
KASSERT(error == 0, ("amdsmn_read2"));
KASSERT((val & AMDTEMP_17H_CCD_TMP_VALID) != 0,
@@ -801,7 +808,7 @@ amdtemp_probe_ccd_sensors(device_t dev, uint32_t maxreg)
sc = device_get_softc(dev);
for (i = 0; i < maxreg; i++) {
- error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CCD_TMP_BASE +
+ error = amdsmn_read(sc->sc_smn, sc->sc_temp_base +
(i * sizeof(val)), &val);
if (error != 0)
continue;
@@ -846,6 +853,7 @@ amdtemp_probe_ccd_sensors17h(device_t dev, uint32_t model)
static void
amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model)
{
+ struct amdtemp_softc *sc = device_get_softc(dev);
uint32_t maxreg;
switch (model) {
@@ -854,6 +862,11 @@ amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model)
maxreg = 8;
_Static_assert((int)NUM_CCDS >= 8, "");
break;
+ case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */
+ sc->sc_temp_base = AMDTEMP_ZEN4_CCD_TMP_BASE;
+ maxreg = 8;
+ _Static_assert((int)NUM_CCDS >= 8, "");
+ break;
default:
device_printf(dev,
"Unrecognized Family 19h Model: %02xh\n", model);
