The branch stable/13 has been updated by markj:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=b16a120b3b9b682944da8d54d826e52fa7720e04

commit b16a120b3b9b682944da8d54d826e52fa7720e04
Author:     Mark Johnston <ma...@freebsd.org>
AuthorDate: 2023-06-28 20:06:37 +0000
Commit:     Mark Johnston <ma...@freebsd.org>
CommitDate: 2023-07-05 13:06:59 +0000

    bhyve: Rename a pci_cfgrw() parameter
    
    pci_cfgrw() may be called via a write to the extended config space,
    which is memory-mapped.  In this case, the name "eax" is misleading.
    Give it a more generic name.  No functional change intended.
    
    Reviewed by:    corvink, jhb
    MFC after:      1 week
    Sponsored by:   Innovate UK
    Differential Revision:  https://reviews.freebsd.org/D40732
    
    (cherry picked from commit f4841d8af0cd42c16fa66529bfde7b3a8b4f16d6)
---
 usr.sbin/bhyve/pci_emul.c | 34 +++++++++++++++++-----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/usr.sbin/bhyve/pci_emul.c b/usr.sbin/bhyve/pci_emul.c
index 41b7718e6935..34ce3cb7d49a 100644
--- a/usr.sbin/bhyve/pci_emul.c
+++ b/usr.sbin/bhyve/pci_emul.c
@@ -2099,7 +2099,7 @@ pci_emul_cmdsts_write(struct pci_devinst *pi, int coff, 
uint32_t new, int bytes)
 
 static void
 pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
-    uint32_t *eax)
+    uint32_t *valp)
 {
        struct businfo *bi;
        struct slotinfo *si;
@@ -2121,7 +2121,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, 
int bytes,
        if (pi == NULL || (bytes != 1 && bytes != 2 && bytes != 4) ||
            (coff & (bytes - 1)) != 0) {
                if (in)
-                       *eax = 0xffffffff;
+                       *valp = 0xffffffff;
                return;
        }
 
@@ -2131,7 +2131,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, 
int bytes,
         */
        if (coff >= PCI_REGMAX + 1) {
                if (in) {
-                       *eax = 0xffffffff;
+                       *valp = 0xffffffff;
                        /*
                         * Extended capabilities begin at offset 256 in config
                         * space. Absence of extended capabilities is signaled
@@ -2139,7 +2139,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, 
int bytes,
                         * offset 256.
                         */
                        if (coff <= PCI_REGMAX + 4)
-                               *eax = 0x00000000;
+                               *valp = 0x00000000;
                }
                return;
        }
@@ -2152,19 +2152,19 @@ pci_cfgrw(int in, int bus, int slot, int func, int 
coff, int bytes,
        if (in) {
                /* Let the device emulation override the default handler */
                if (pe->pe_cfgread != NULL) {
-                       needcfg = pe->pe_cfgread(pi, coff, bytes, eax);
+                       needcfg = pe->pe_cfgread(pi, coff, bytes, valp);
                } else {
                        needcfg = 1;
                }
 
                if (needcfg)
-                       *eax = CFGREAD(pi, coff, bytes);
+                       *valp = CFGREAD(pi, coff, bytes);
 
-               pci_emul_hdrtype_fixup(bus, slot, coff, bytes, eax);
+               pci_emul_hdrtype_fixup(bus, slot, coff, bytes, valp);
        } else {
                /* Let the device emulation override the default handler */
                if (pe->pe_cfgwrite != NULL &&
-                   (*pe->pe_cfgwrite)(pi, coff, bytes, *eax) == 0)
+                   (*pe->pe_cfgwrite)(pi, coff, bytes, *valp) == 0)
                        return;
 
                /*
@@ -2193,7 +2193,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, 
int bytes,
                                pi->pi_bar[idx].addr = bar = 0;
                                break;
                        case PCIBAR_IO:
-                               addr = *eax & mask;
+                               addr = *valp & mask;
                                addr &= 0xffff;
                                bar = addr | pi->pi_bar[idx].lobits;
                                /*
@@ -2205,7 +2205,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, 
int bytes,
                                }
                                break;
                        case PCIBAR_MEM32:
-                               addr = bar = *eax & mask;
+                               addr = bar = *valp & mask;
                                bar |= pi->pi_bar[idx].lobits;
                                if (addr != pi->pi_bar[idx].addr) {
                                        update_bar_address(pi, addr, idx,
@@ -2213,7 +2213,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, 
int bytes,
                                }
                                break;
                        case PCIBAR_MEM64:
-                               addr = bar = *eax & mask;
+                               addr = bar = *valp & mask;
                                bar |= pi->pi_bar[idx].lobits;
                                if (addr != (uint32_t)pi->pi_bar[idx].addr) {
                                        update_bar_address(pi, addr, idx,
@@ -2222,7 +2222,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, 
int bytes,
                                break;
                        case PCIBAR_MEMHI64:
                                mask = ~(pi->pi_bar[idx - 1].size - 1);
-                               addr = ((uint64_t)*eax << 32) & mask;
+                               addr = ((uint64_t)*valp << 32) & mask;
                                bar = addr >> 32;
                                if (bar != pi->pi_bar[idx - 1].addr >> 32) {
                                        update_bar_address(pi, addr, idx - 1,
@@ -2230,12 +2230,12 @@ pci_cfgrw(int in, int bus, int slot, int func, int 
coff, int bytes,
                                }
                                break;
                        case PCIBAR_ROM:
-                               addr = bar = *eax & mask;
+                               addr = bar = *valp & mask;
                                if (memen(pi) && romen(pi)) {
                                        unregister_bar(pi, idx);
                                }
                                pi->pi_bar[idx].addr = addr;
-                               pi->pi_bar[idx].lobits = *eax &
+                               pi->pi_bar[idx].lobits = *valp &
                                    PCIM_BIOS_ENABLE;
                                /* romen could have changed it value */
                                if (memen(pi) && romen(pi)) {
@@ -2249,11 +2249,11 @@ pci_cfgrw(int in, int bus, int slot, int func, int 
coff, int bytes,
                        pci_set_cfgdata32(pi, coff, bar);
 
                } else if (pci_emul_iscap(pi, coff)) {
-                       pci_emul_capwrite(pi, coff, bytes, *eax, 0, 0);
+                       pci_emul_capwrite(pi, coff, bytes, *valp, 0, 0);
                } else if (coff >= PCIR_COMMAND && coff < PCIR_REVID) {
-                       pci_emul_cmdsts_write(pi, coff, *eax, bytes);
+                       pci_emul_cmdsts_write(pi, coff, *valp, bytes);
                } else {
-                       CFGWRITE(pi, coff, *eax, bytes);
+                       CFGWRITE(pi, coff, *valp, bytes);
                }
        }
 }

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