The branch main has been updated by mhorne:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=b82f4170fca86e9b41b613715852d4f225b26e3a

commit b82f4170fca86e9b41b613715852d4f225b26e3a
Author:     Mitchell Horne <mho...@freebsd.org>
AuthorDate: 2022-06-21 16:23:21 +0000
Commit:     Mitchell Horne <mho...@freebsd.org>
CommitDate: 2022-06-23 18:15:11 +0000

    riscv timer: remove intermediate helper
    
    get_counts() doesn't do anything at the moment but return the result of
    get_cycles(), so remove it.
    
    For clarity, rename get_cycles() to get_timecount(); RISC-V defines
    separate time and cyclecount CSRs, so let's avoid confusing the two.
    They may be backed by the same underlying clock, but this is an
    implementation detail.
    
    MFC after:      1 week
    Sponsored by:   The FreeBSD Foundation
    Differential Revision:  https://reviews.freebsd.org/D35461
---
 sys/riscv/riscv/timer.c | 25 ++++++-------------------
 1 file changed, 6 insertions(+), 19 deletions(-)

diff --git a/sys/riscv/riscv/timer.c b/sys/riscv/riscv/timer.c
index 5cdfe9cceb41..358b89e2be18 100644
--- a/sys/riscv/riscv/timer.c
+++ b/sys/riscv/riscv/timer.c
@@ -78,30 +78,17 @@ static struct timecounter riscv_timer_timecount = {
 };
 
 static inline uint64_t
-get_cycles(void)
+get_timecount(void)
 {
 
        return (rdtime());
 }
 
-static long
-get_counts(struct riscv_timer_softc *sc)
-{
-       uint64_t counts;
-
-       counts = get_cycles();
-
-       return (counts);
-}
-
 static u_int
-riscv_timer_tc_get_timecount(struct timecounter *tc)
+riscv_timer_tc_get_timecount(struct timecounter *tc __unused)
 {
-       struct riscv_timer_softc *sc;
-
-       sc = tc->tc_priv;
 
-       return (get_counts(sc));
+       return (get_timecount());
 }
 
 static uint32_t
@@ -120,7 +107,7 @@ riscv_timer_et_start(struct eventtimer *et, sbintime_t 
first, sbintime_t period)
 
        if (first != 0) {
                counts = ((uint32_t)et->et_frequency * first) >> 32;
-               sbi_set_timer(get_cycles() + counts);
+               sbi_set_timer(get_timecount() + counts);
                csr_set(sie, SIE_STIE);
 
                return (0);
@@ -286,10 +273,10 @@ DELAY(int usec)
        else
                counts = usec * counts_per_usec;
 
-       first = get_counts(riscv_timer_sc);
+       first = get_timecount();
 
        while (counts > 0) {
-               last = get_counts(riscv_timer_sc);
+               last = get_timecount();
                counts -= (int64_t)(last - first);
                first = last;
        }

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