The branch main has been updated by mhorne:
URL:
https://cgit.FreeBSD.org/src/commit/?id=35c9edab4169f99de7e8fcada6d9b499c8405f87
commit 35c9edab4169f99de7e8fcada6d9b499c8405f87
Author: Jiahao Li <jiah...@blackberry.com>
AuthorDate: 2022-06-21 13:23:43 +0000
Commit: Mitchell Horne <mho...@freebsd.org>
CommitDate: 2022-06-23 18:15:10 +0000
if_dwc: enable RX checksum offload feature
We claim support in ifcaps, but don't actually enable it.
PR: 263886
Reviewed by: manu
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D35498
---
sys/dev/dwc/if_dwc.c | 21 +++++++++++++++++++++
sys/dev/dwc/if_dwc.h | 1 +
2 files changed, 22 insertions(+)
diff --git a/sys/dev/dwc/if_dwc.c b/sys/dev/dwc/if_dwc.c
index 531a83d1a41b..1685866ad9ad 100644
--- a/sys/dev/dwc/if_dwc.c
+++ b/sys/dev/dwc/if_dwc.c
@@ -518,6 +518,20 @@ dwc_enable_mac(struct dwc_softc *sc, bool enable)
WRITE4(sc, MAC_CONFIGURATION, reg);
}
+static void
+dwc_enable_csum_offload(struct dwc_softc *sc)
+{
+ uint32_t reg;
+
+ DWC_ASSERT_LOCKED(sc);
+ reg = READ4(sc, MAC_CONFIGURATION);
+ if ((if_getcapenable(sc->ifp) & IFCAP_RXCSUM) != 0)
+ reg |= CONF_IPC;
+ else
+ reg &= ~CONF_IPC;
+ WRITE4(sc, MAC_CONFIGURATION, reg);
+}
+
static void
dwc_get_hwaddr(struct dwc_softc *sc, uint8_t *hwaddr)
{
@@ -1163,6 +1177,7 @@ dwc_init_locked(struct dwc_softc *sc)
dwc_setup_rxfilter(sc);
dwc_setup_core(sc);
dwc_enable_mac(sc, true);
+ dwc_enable_csum_offload(sc);
dwc_init_dma(sc);
if_setdrvflagbits(ifp, IFF_DRV_RUNNING, IFF_DRV_OACTIVE);
@@ -1261,6 +1276,12 @@ dwc_ioctl(if_t ifp, u_long cmd, caddr_t data)
if_sethwassistbits(ifp, CSUM_IP | CSUM_UDP | CSUM_TCP,
0);
else
if_sethwassistbits(ifp, 0, CSUM_IP | CSUM_UDP |
CSUM_TCP);
+
+ if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) {
+ DWC_LOCK(sc);
+ dwc_enable_csum_offload(sc);
+ DWC_UNLOCK(sc);
+ }
break;
default:
diff --git a/sys/dev/dwc/if_dwc.h b/sys/dev/dwc/if_dwc.h
index d8c10258388a..09455f61cea9 100644
--- a/sys/dev/dwc/if_dwc.h
+++ b/sys/dev/dwc/if_dwc.h
@@ -48,6 +48,7 @@
#define CONF_PS (1 << 15) /* GMII/MII */
#define CONF_FES (1 << 14) /* MII speed select */
#define CONF_DM (1 << 11) /* Full Duplex Enable */
+#define CONF_IPC (1 << 10) /* IPC checksum offload
*/
#define CONF_ACS (1 << 7)
#define CONF_TE (1 << 3)
#define CONF_RE (1 << 2)
