The branch main has been updated by mhorne:
URL:
https://cgit.FreeBSD.org/src/commit/?id=34f4c17a2b3df50e9badd030edba187d6acf3b87
commit 34f4c17a2b3df50e9badd030edba187d6acf3b87
Author: Milan Obuch <b...@dino.sk>
AuthorDate: 2022-04-07 13:04:18 +0000
Commit: Mitchell Horne <mho...@freebsd.org>
CommitDate: 2022-04-12 22:51:17 +0000
cgem: support SGMII PHY connection mode
As the PolarFire SoC needs SGMII to connect the PHY, check the
'phy-mode' property of device tree node for ethernet and act on it
appropriately.
Add the compatible strings for the PolarFire SoC device tree.
'microchip,mpfs-mss-gem" is not officially documented but has been
observed in the available firmware for this platform, so it is included
for now.
Also, fix a typo in if_cgem_hw.h.
Reviewed by: mhorne
MFC after: 1 week
Sponsored by: Conclusive Engineering
Differential Revision: https://reviews.freebsd.org/D34764
---
sys/dev/cadence/if_cgem.c | 14 ++++++++++++++
sys/dev/cadence/if_cgem_hw.h | 2 +-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/sys/dev/cadence/if_cgem.c b/sys/dev/cadence/if_cgem.c
index 979ca524c624..948e1c6b6c69 100644
--- a/sys/dev/cadence/if_cgem.c
+++ b/sys/dev/cadence/if_cgem.c
@@ -76,6 +76,7 @@ __FBSDID("$FreeBSD$");
#include <dev/mii/mii.h>
#include <dev/mii/miivar.h>
+#include <dev/mii/mii_fdt.h>
#include <dev/extres/clk/clk.h>
@@ -109,9 +110,11 @@ __FBSDID("$FreeBSD$");
static struct ofw_compat_data compat_data[] = {
{ "cdns,zynq-gem", HWQUIRK_RXHANGWAR | HWQUIRK_TXCLK },
{ "cdns,zynqmp-gem", HWQUIRK_NEEDNULLQS | HWQUIRK_TXCLK },
+ { "microchip,mpfs-mss-gem", HWQUIRK_NEEDNULLQS | HWQUIRK_TXCLK },
{ "sifive,fu540-c000-gem", HWQUIRK_PCLK },
{ "sifive,fu740-c000-gem", HWQUIRK_PCLK },
{ "cdns,gem", HWQUIRK_NONE },
+ { "cdns,macb", HWQUIRK_NONE },
{ "cadence,gem", HWQUIRK_NONE },
{ NULL, 0 }
};
@@ -131,6 +134,7 @@ struct cgem_softc {
uint32_t net_cfg_shadow;
clk_t ref_clk;
int neednullqs;
+ int phy_contype;
bus_dma_tag_t desc_dma_tag;
bus_dma_tag_t mbuf_dma_tag;
@@ -1084,6 +1088,12 @@ cgem_config(struct cgem_softc *sc)
CGEM_NET_CFG_GIGE_EN | CGEM_NET_CFG_1536RXEN |
CGEM_NET_CFG_FULL_DUPLEX | CGEM_NET_CFG_SPEED100);
+ /* Check connection type, enable SGMII bits if necessary. */
+ if (sc->phy_contype == MII_CONTYPE_SGMII) {
+ sc->net_cfg_shadow |= CGEM_NET_CFG_SGMII_EN;
+ sc->net_cfg_shadow |= CGEM_NET_CFG_PCS_SEL;
+ }
+
/* Enable receive checksum offloading? */
if ((if_getcapenable(ifp) & IFCAP_RXCSUM) != 0)
sc->net_cfg_shadow |= CGEM_NET_CFG_RX_CHKSUM_OFFLD_EN;
@@ -1728,6 +1738,7 @@ cgem_attach(device_t dev)
int rid, err;
u_char eaddr[ETHER_ADDR_LEN];
int hwquirks;
+ phandle_t node;
sc->dev = dev;
CGEM_LOCK_INIT(sc);
@@ -1753,6 +1764,9 @@ cgem_attach(device_t dev)
device_printf(dev, "could not enable clock.\n");
}
+ node = ofw_bus_get_node(dev);
+ sc->phy_contype = mii_fdt_get_contype(node);
+
/* Get memory resource. */
rid = 0;
sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
diff --git a/sys/dev/cadence/if_cgem_hw.h b/sys/dev/cadence/if_cgem_hw.h
index 784b131a885e..afba8f7dfcd7 100644
--- a/sys/dev/cadence/if_cgem_hw.h
+++ b/sys/dev/cadence/if_cgem_hw.h
@@ -63,7 +63,7 @@
#define CGEM_NET_CTRL_RX_EN (1 << 2)
#define CGEM_NET_CTRL_LOOP_LOCAL (1 << 1)
-#define CGEM_NET_CFG 0x004 /* Netowrk Configuration */
+#define CGEM_NET_CFG 0x004 /* Network Configuration */
#define CGEM_NET_CFG_UNIDIR_EN (1U << 31)
#define CGEM_NET_CFG_IGNORE_IPG_RX_ER (1 << 30)
#define CGEM_NET_CFG_RX_BAD_PREAMBLE (1 << 29)
