git: 2b2925d1e872 - stable/13 - nvme: Move to a quirk for the Intel alignment data

[Alexander Motin]

The branch stable/13 has been updated by mav:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=2b2925d1e8726af3d393c74c9eb25d1fb048c3dc

commit 2b2925d1e8726af3d393c74c9eb25d1fb048c3dc
Author:     Warner Losh <i...@freebsd.org>
AuthorDate: 2021-12-06 17:22:50 +0000
Commit:     Alexander Motin <m...@freebsd.org>
CommitDate: 2022-01-21 02:07:31 +0000

    nvme: Move to a quirk for the Intel alignment data
    
    Prior to NVMe 1.3, Intel produced a series of drives that had
    performance alignment data in the vendor specific space since no
    standard had been defined. Move testing the versions to a quick so the
    NVMe NS code doesn't know about PCI device info.
    
    Sponsored by:           Netflix
    Reviewed by:            mav
    Differential Revision:  https://reviews.freebsd.org/D33284
    
    (cherry picked from commit 053f8ed6ebf2355a92cb1798a9701f701610771c)
---
 sys/dev/nvme/nvme_ns.c      | 10 ++--------
 sys/dev/nvme/nvme_pci.c     |  4 ++++
 sys/dev/nvme/nvme_private.h |  1 +
 3 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/sys/dev/nvme/nvme_ns.c b/sys/dev/nvme/nvme_ns.c
index 8f97b08b88f4..ba6960e476f8 100644
--- a/sys/dev/nvme/nvme_ns.c
+++ b/sys/dev/nvme/nvme_ns.c
@@ -571,20 +571,14 @@ nvme_ns_construct(struct nvme_namespace *ns, uint32_t id,
         * that improves performance.  If present use for the stripe size.  NVMe
         * 1.3 standardized this as NOIOB, and newer Intel drives use that.
         */
-       switch (pci_get_devid(ctrlr->dev)) {
-       case 0x09538086:                /* Intel DC PC3500 */
-       case 0x0a538086:                /* Intel DC PC3520 */
-       case 0x0a548086:                /* Intel DC PC4500 */
-       case 0x0a558086:                /* Dell Intel P4600 */
+       if ((ctrlr->quirks & QUIRK_INTEL_ALIGNMENT) != 0) {
                if (ctrlr->cdata.vs[3] != 0)
                        ns->boundary =
                            (1 << ctrlr->cdata.vs[3]) * ctrlr->min_page_size;
                else
                        ns->boundary = 0;
-               break;
-       default:
+       } else {
                ns->boundary = ns->data.noiob * nvme_ns_get_sector_size(ns);
-               break;
        }
 
        if (nvme_ctrlr_has_dataset_mgmt(&ctrlr->cdata))
diff --git a/sys/dev/nvme/nvme_pci.c b/sys/dev/nvme/nvme_pci.c
index e87860bde7e6..20ffe6574dce 100644
--- a/sys/dev/nvme/nvme_pci.c
+++ b/sys/dev/nvme/nvme_pci.c
@@ -85,6 +85,10 @@ static struct _pcsid
        { 0x09538086,           1, 0x3705, "DC P3500 SSD [2.5\" SFF]" },
        { 0x09538086,           1, 0x3709, "DC P3600 SSD [Add-in Card]" },
        { 0x09538086,           1, 0x370a, "DC P3600 SSD [2.5\" SFF]" },
+       { 0x09538086,           0, 0, "Intel DC PC3500", QUIRK_INTEL_ALIGNMENT 
},
+       { 0x0a538086,           0, 0, "Intel DC PC3520", QUIRK_INTEL_ALIGNMENT 
},
+       { 0x0a548086,           0, 0, "Intel DC PC4500", QUIRK_INTEL_ALIGNMENT 
},
+       { 0x0a558086,           0, 0, "Dell Intel P4600", QUIRK_INTEL_ALIGNMENT 
},
        { 0x00031c58,           0, 0, "HGST SN100",     QUIRK_DELAY_B4_CHK_RDY 
},
        { 0x00231c58,           0, 0, "WDC SN200",      QUIRK_DELAY_B4_CHK_RDY 
},
        { 0x05401c5f,           0, 0, "Memblaze Pblaze4", 
QUIRK_DELAY_B4_CHK_RDY },
diff --git a/sys/dev/nvme/nvme_private.h b/sys/dev/nvme/nvme_private.h
index 9c7c1b46eab4..3f89f12cf8fd 100644
--- a/sys/dev/nvme/nvme_private.h
+++ b/sys/dev/nvme/nvme_private.h
@@ -240,6 +240,7 @@ struct nvme_controller {
        uint32_t                quirks;
 #define        QUIRK_DELAY_B4_CHK_RDY  1               /* Can't touch MMIO on 
disable */
 #define        QUIRK_DISABLE_TIMEOUT   2               /* Disable broken 
completion timeout feature */
+#define        QUIRK_INTEL_ALIGNMENT   4               /* Pre NVMe 1.3 
performance alignment */
 
        bus_space_tag_t         bus_tag;
        bus_space_handle_t      bus_handle;