The branch main has been updated by wma:
URL:
https://cgit.FreeBSD.org/src/commit/?id=9da8235cc843364bd2df7a4d6fcd8c1be7ca67c0
commit 9da8235cc843364bd2df7a4d6fcd8c1be7ca67c0
Author: Paweł Anikiel <p...@semihalf.com>
AuthorDate: 2021-07-30 08:57:28 +0000
Commit: Wojciech Macek <w...@freebsd.org>
CommitDate: 2021-08-26 10:04:28 +0000
ichwd: add Lewisburg Super SKUs, Cannon and Comet Lake support
Cannon and Comet Lake PCHs have their PMC hidden, so when reading
the ACPI Base Address fails, we assume a default value.
Obtained from: Semihalf
Sponsored by: Stormshield
---
sys/dev/ichwd/ichwd.c | 27 ++++++++++++++++++++-------
sys/dev/ichwd/ichwd.h | 14 ++++++++++++++
2 files changed, 34 insertions(+), 7 deletions(-)
diff --git a/sys/dev/ichwd/ichwd.c b/sys/dev/ichwd/ichwd.c
index 587f99f9e7ee..5aab4af0a1f7 100644
--- a/sys/dev/ichwd/ichwd.c
+++ b/sys/dev/ichwd/ichwd.c
@@ -296,6 +296,9 @@ static struct ichwd_device ichwd_devices[] = {
static struct ichwd_device ichwd_smb_devices[] = {
{ DEVICEID_LEWISBURG_SMB, "Lewisburg watchdog timer", 10, 4 },
+ { DEVICEID_LEWISBURG_SMB_SSKU, "Lewisburg watchdog timer", 10, 4 },
+ { DEVICEID_CANNON_SMB, "Cannon Lake watchdog timer", 10, 4,
PMC_HIDDEN},
+ { DEVICEID_COMET_SMB, "Comet Lake watchdog timer", 10, 4,
PMC_HIDDEN},
{ DEVICEID_SRPTLP_SMB, "Sunrise Point-LP watchdog timer", 10, 4 },
{ DEVICEID_C3000, "Intel Atom C3000 watchdog timer", 10, 4 },
{ 0, NULL, 0, 0 },
@@ -788,13 +791,23 @@ ichwd_smb_attach(device_t dev)
isab = device_get_parent(device_get_parent(dev));
pmdev = pci_find_dbsf(pci_get_domain(isab), pci_get_bus(isab), 31, 2);
if (pmdev == NULL) {
- device_printf(dev, "unable to find Power Management device\n");
- return (ENXIO);
- }
- acpi_base = pci_read_config(pmdev, ICH_PMBASE, 4) & 0xffffff00;
- if (acpi_base == 0) {
- device_printf(dev, "ACPI base address is not set\n");
- return (ENXIO);
+ if (id_p->quirks & PMC_HIDDEN) {
+ /*
+ * Since the PMC is hidden, we take the default value
for the
+ * given device, which happens to be the same for the
ones we
+ * support.
+ */
+ acpi_base = ACPI_DEFAULT_CANNON;
+ } else {
+ device_printf(dev, "unable to find Power Management
device\n");
+ return (ENXIO);
+ }
+ } else {
+ acpi_base = pci_read_config(pmdev, ICH_PMBASE, 4) & 0xffffff00;
+ if (acpi_base == 0) {
+ device_printf(dev, "ACPI base address is not set\n");
+ return (ENXIO);
+ }
}
/* Allocate SMI control I/O register space. */
diff --git a/sys/dev/ichwd/ichwd.h b/sys/dev/ichwd/ichwd.h
index f78485249871..4a15d5201a4b 100644
--- a/sys/dev/ichwd/ichwd.h
+++ b/sys/dev/ichwd/ichwd.h
@@ -38,6 +38,7 @@ struct ichwd_device {
char *desc;
unsigned int ich_version;
unsigned int tco_version;
+ uint32_t quirks;
};
struct ichwd_softc {
@@ -277,6 +278,9 @@ struct ichwd_softc {
#define DEVICEID_WCPT_LP7 0x9cc7
#define DEVICEID_WCPT_LP9 0x9cc9
#define DEVICEID_LEWISBURG_SMB 0xa1a3
+#define DEVICEID_LEWISBURG_SMB_SSKU 0xa223
+#define DEVICEID_CANNON_SMB 0xa323
+#define DEVICEID_COMET_SMB 0x06a3
#define DEVICEID_SRPTLP_SMB 0x9d23
/* ICH LPC Interface Bridge Registers (ICH5 and older) */
@@ -386,6 +390,9 @@ struct ichwd_softc {
#define TCO_INTRD_SEL_INTR 0x0001
#define TCO_INTRD_SEL_SMI 0x0002
+/* default ACPI Base values */
+#define ACPI_DEFAULT_CANNON 0x1800
+
/*
* Masks for the TCO timer value field in TCO_RLD.
* If the datasheets are to be believed, the minimum value actually varies
@@ -408,4 +415,11 @@ struct ichwd_softc {
*/
#define ICHWD_TCO_V3_TICK 1000000000
+/*
+ * Quirks
+ */
+
+/* On Cannon Lake and Commet Lake PHCs, the PMC is hidden */
+#define PMC_HIDDEN (1 << 0)
+
#endif
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