The branch main has been updated by kbowling (ports committer):

URL: 
https://cgit.FreeBSD.org/src/commit/?id=69e8e8ea3d4be9da6b5bc904a444b51958128ff5

commit 69e8e8ea3d4be9da6b5bc904a444b51958128ff5
Author:     Kevin Bowling <[email protected]>
AuthorDate: 2021-08-16 17:17:34 +0000
Commit:     Kevin Bowling <[email protected]>
CommitDate: 2021-08-16 17:24:01 +0000

    e1000: always enable PCSD when RSS hashing
    
    To enable RSS hashing in the NIC, the PCSD bit must be set.
    
    By default, this is never set when RXCSUM is disabled - which
    causes problems higher up in the stack.
    
    While here improve the RXCSUM flag assignments when enabling or
    disabling IFCAP_RXCSUM.
    
    See also: 
https://lists.freebsd.org/pipermail/freebsd-current/2020-May/076148.html
    
    Reviewed by:    markj, Franco Fichtner <[email protected]>,
                    Stephan de Wit <[email protected]>
    Obtained from:  OPNsense
    MFC after:      1 week
    Differential Revision:  https://reviews.freebsd.org/D31501
    Co-authored-by: Stephan de Wit <[email protected]>
    Co-authored-by: Franco Fichtner <[email protected]>
---
 sys/dev/e1000/e1000_82575.h   |  3 +--
 sys/dev/e1000/e1000_defines.h | 11 ++++++-----
 sys/dev/e1000/if_em.c         | 44 ++++++++++++++++++++-----------------------
 3 files changed, 27 insertions(+), 31 deletions(-)

diff --git a/sys/dev/e1000/e1000_82575.h b/sys/dev/e1000/e1000_82575.h
index a96b25f4169d..36045556661b 100644
--- a/sys/dev/e1000/e1000_82575.h
+++ b/sys/dev/e1000/e1000_82575.h
@@ -143,13 +143,12 @@ struct e1000_adv_context_desc {
 #define E1000_TX_HEAD_WB_ENABLE                0x1
 #define E1000_TX_SEQNUM_WB_ENABLE      0x2
 
-#define E1000_MRQC_ENABLE_RSS_4Q               0x00000002
+#define E1000_MRQC_ENABLE_RSS_MQ               0x00000002
 #define E1000_MRQC_ENABLE_VMDQ                 0x00000003
 #define E1000_MRQC_ENABLE_VMDQ_RSS_2Q          0x00000005
 #define E1000_MRQC_RSS_FIELD_IPV4_UDP          0x00400000
 #define E1000_MRQC_RSS_FIELD_IPV6_UDP          0x00800000
 #define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX       0x01000000
-#define E1000_MRQC_ENABLE_RSS_8Q               0x00000002
 
 #define E1000_VMRCTL_MIRROR_PORT_SHIFT         8
 #define E1000_VMRCTL_MIRROR_DSTPORT_MASK       (7 << \
diff --git a/sys/dev/e1000/e1000_defines.h b/sys/dev/e1000/e1000_defines.h
index 722596b36e34..262b01dd5b64 100644
--- a/sys/dev/e1000/e1000_defines.h
+++ b/sys/dev/e1000/e1000_defines.h
@@ -428,11 +428,12 @@
 #define E1000_SCTL_ENABLE_SERDES_LOOPBACK      0x0410
 
 /* Receive Checksum Control */
-#define E1000_RXCSUM_IPOFL     0x00000100 /* IPv4 checksum offload */
-#define E1000_RXCSUM_TUOFL     0x00000200 /* TCP / UDP checksum offload */
-#define E1000_RXCSUM_CRCOFL    0x00000800 /* CRC32 offload enable */
-#define E1000_RXCSUM_IPPCSE    0x00001000 /* IP payload checksum enable */
-#define E1000_RXCSUM_PCSD      0x00002000 /* packet checksum disabled */
+#define E1000_RXCSUM_IPOFL             0x00000100 /* IPv4 checksum offload */
+#define E1000_RXCSUM_TUOFL             0x00000200 /* TCP / UDP checksum 
offload */
+#define E1000_RXCSUM_IPV6OFL   0x00000400  /* lem(4) IPv6 checksum offload */
+#define E1000_RXCSUM_CRCOFL            0x00000800 /* CRC32 offload enable */
+#define E1000_RXCSUM_IPPCSE            0x00001000 /* IP payload checksum 
enable */
+#define E1000_RXCSUM_PCSD              0x00002000 /* packet checksum disabled 
*/
 
 /* Header split receive */
 #define E1000_RFCTL_NFSW_DIS           0x00000040
diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c
index 33d5341ed8ce..3f748b6bcacd 100644
--- a/sys/dev/e1000/if_em.c
+++ b/sys/dev/e1000/if_em.c
@@ -2838,7 +2838,7 @@ igb_initialize_rss_mapping(struct adapter *adapter)
         * MRQC: Multiple Receive Queues Command
         * Set queuing to RSS control, number depends on the device.
         */
-       mrqc = E1000_MRQC_ENABLE_RSS_8Q;
+       mrqc = E1000_MRQC_ENABLE_RSS_MQ;
 
 #ifdef RSS
        /* XXX ew typecasting */
@@ -3245,37 +3245,33 @@ em_initialize_receive_unit(if_ctx_t ctx)
                E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
        }
 
+       /* Set up L3 and L4 csum Rx descriptor offloads */
        rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
-       if (if_getcapenable(ifp) & IFCAP_RXCSUM &&
-           hw->mac.type >= e1000_82543) {
-               if (adapter->tx_num_queues > 1) {
-                       if (hw->mac.type >= igb_mac_min) {
-                               rxcsum |= E1000_RXCSUM_PCSD;
-                               if (hw->mac.type != e1000_82575)
-                                       rxcsum |= E1000_RXCSUM_CRCOFL;
-                       } else
-                               rxcsum |= E1000_RXCSUM_TUOFL |
-                                       E1000_RXCSUM_IPOFL |
-                                       E1000_RXCSUM_PCSD;
-               } else {
-                       if (hw->mac.type >= igb_mac_min)
-                               rxcsum |= E1000_RXCSUM_IPPCSE;
-                       else
-                               rxcsum |= E1000_RXCSUM_TUOFL | 
E1000_RXCSUM_IPOFL;
-                       if (hw->mac.type > e1000_82575)
-                               rxcsum |= E1000_RXCSUM_CRCOFL;
-               }
-       } else
-               rxcsum &= ~E1000_RXCSUM_TUOFL;
-
-       E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
+       if (scctx->isc_capenable & IFCAP_RXCSUM) {
+               rxcsum |= E1000_RXCSUM_TUOFL | E1000_RXCSUM_IPOFL;
+               if (hw->mac.type > e1000_82575)
+                       rxcsum |= E1000_RXCSUM_CRCOFL;
+               else if (hw->mac.type < em_mac_min &&
+                   scctx->isc_capenable & IFCAP_HWCSUM_IPV6)
+                       rxcsum |= E1000_RXCSUM_IPV6OFL;
+       } else {
+               rxcsum &= ~(E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
+               if (hw->mac.type > e1000_82575)
+                       rxcsum &= ~E1000_RXCSUM_CRCOFL;
+               else if (hw->mac.type < em_mac_min)
+                       rxcsum &= ~E1000_RXCSUM_IPV6OFL;
+       }
 
        if (adapter->rx_num_queues > 1) {
+               /* RSS hash needed in the Rx descriptor */
+               rxcsum |= E1000_RXCSUM_PCSD;
+
                if (hw->mac.type >= igb_mac_min)
                        igb_initialize_rss_mapping(adapter);
                else
                        em_initialize_rss_mapping(adapter);
        }
+       E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
 
        /*
         * XXX TEMPORARY WORKAROUND: on some systems with 82573
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