Rebased ref, commits from common ancestor:
commit a8ecb929d9f72b24dc7b45c03eaf606bc6c64bee
Author: Brice Goglin <bgog...@debian.org>
Date: Fri Apr 16 07:09:36 2010 +0200
Prepare changelog for upload
diff --git a/debian/changelog b/debian/changelog
index c6b7091..0f3e99d 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,11 +1,11 @@
-libdrm (2.4.20-1) UNRELEASED; urgency=low
+libdrm (2.4.20-1) experimental; urgency=low
* New upstream release.
+ Cherry-pick upstream fixes 107ccd92 and 332739e3.
* Update libdrm-intel1.symbols, libdrm-radeon1.symbols and shlibs.
* Disable libkms for now.
- -- Brice Goglin <bgog...@debian.org> Tue, 06 Apr 2010 21:46:57 +0200
+ -- Brice Goglin <bgog...@debian.org> Fri, 16 Apr 2010 07:14:41 +0200
libdrm (2.4.18-5) unstable; urgency=low
commit 882cf719a5ddd2182b454c578658a89465e86a03
Author: Brice Goglin <bgog...@debian.org>
Date: Fri Apr 16 07:08:27 2010 +0200
Update changelog with cherry-picked commits
diff --git a/debian/changelog b/debian/changelog
index 48020ef..c91bc71 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,7 @@
libdrm (2.4.20-1) UNRELEASED; urgency=low
* New upstream release.
+ + Cherry-pick upstream fixes 107ccd92 and 332739e3.
* Update libdrm-intel1.symbols, libdrm-radeon1.symbols and shlibs.
* Disable libkms for now.
commit 332739e3074135b00e781468ad8aaed1950f5453
Author: Chris Wilson <ch...@chris-wilson.co.uk>
Date: Sun Apr 11 18:40:38 2010 +0100
intel: Use the correct size when allocating reloc_target_info array
Thomas tracked down this error with kdm and commit b509640:
==4320== Invalid write of size 8
==4320== at 0x9A97998: do_bo_emit_reloc (in
/usr/lib/libdrm_intel.so.1.0.0)
==4320== by 0x9A97B9C: drm_intel_gem_bo_emit_reloc (in
/usr/lib/libdrm_intel.so.1.0.0)
==4320== by 0xAED3234: intel_batchbuffer_emit_reloc (in
/usr/lib/xorg/modules/dri/i965_dri.so)
==4320== by 0xAF13827: brw_emit_vertices (in
/usr/lib/xorg/modules/dri/i965_dri.so)
==4320== by 0xAF1F14D: brw_upload_state (in
/usr/lib/xorg/modules/dri/i965_dri.so)
==4320== by 0xAF12122: brw_draw_prims (in
/usr/lib/xorg/modules/dri/i965_dri.so)
==4320== by 0xB256824: vbo_exec_vtx_flush (in
/usr/lib/xorg/modules/dri/libdricore.so)
==4320== by 0xB2523BB: vbo_exec_FlushVertices_internal (in
/usr/lib/xorg/modules/dri/libdricore.so)
==4320== by 0xB252411: vbo_exec_FlushVertices (in
/usr/lib/xorg/modules/dri/libdricore.so)
==4320== by 0xB195A3D: _mesa_PopAttrib (in
/usr/lib/xorg/modules/dri/libdricore.so)
==4320== by 0x8DF0F02: __glXDisp_Render (in
/usr/lib/xorg/modules/extensions/libglx.xorg)
==4320== by 0x8DF517F: __glXDispatch (in
/usr/lib/xorg/modules/extensions/libglx.xorg)
==4320== Address 0x126a8b80 is 0 bytes after a block of size 16,368 alloc'd
==4320== at 0x4C23E03: malloc (in
/usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
==4320== by 0x9A97A64: do_bo_emit_reloc (in
/usr/lib/libdrm_intel.so.1.0.0)
==4320== by 0x9A97B9C: drm_intel_gem_bo_emit_reloc (in
/usr/lib/libdrm_intel.so.1.0.0)
==4320== by 0xAED3234: intel_batchbuffer_emit_reloc (in
/usr/lib/xorg/modules/dri/i965_dri.so)
==4320== by 0xAF191DB: upload_binding_table_pointers (in
/usr/lib/xorg/modules/dri/i965_dri.so)
==4320== by 0xAF1F14D: brw_upload_state (in
/usr/lib/xorg/modules/dri/i965_dri.so)
==4320== by 0xAF12122: brw_draw_prims (in
/usr/lib/xorg/modules/dri/i965_dri.so)
==4320== by 0xB255EF6: vbo_exec_DrawArrays (in
/usr/lib/xorg/modules/dri/libdricore.so)
==4320== by 0x8DF67A3: __glXDisp_DrawArrays (in
/usr/lib/xorg/modules/extensions/libglx.xorg)
==4320== by 0x8DF0F02: __glXDisp_Render (in
/usr/lib/xorg/modules/extensions/libglx.xorg)
==4320== by 0x8DF517F: __glXDispatch (in
/usr/lib/xorg/modules/extensions/libglx.xorg)
==4320== by 0x446293: ??? (in /usr/bin/Xorg)
which is simply due to only allocating space for the pointers and not
the structs themselves. D'oh.
Reported-by: Thomas Bächler <tho...@archlinux.org>
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 8e46e37..a2cf6e6 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -470,7 +470,7 @@ drm_intel_setup_reloc_list(drm_intel_bo *bo)
bo_gem->relocs = malloc(max_relocs *
sizeof(struct drm_i915_gem_relocation_entry));
bo_gem->reloc_target_info = malloc(max_relocs *
- sizeof(drm_intel_reloc_target *));
+ sizeof(drm_intel_reloc_target));
if (bo_gem->relocs == NULL || bo_gem->reloc_target_info == NULL) {
bo_gem->has_error = 1;
commit 107ccd92d4c5b34e99b70a2af3f83253ceb24b46
Author: Kristian Høgsberg <k...@bitplanet.net>
Date: Fri Apr 9 16:33:38 2010 -0400
Revert "Fix pkgconfig includes for /usr/include/drm"
This reverts commit 245d6957794648d7fd83279c680fed6e4c262147.
libdrm now install headers in ${includedir}/libdrm and /usr/include/drm
is reserved for the kernel headers. We should only ever add one of these
to the CFLAGS.
diff --git a/libdrm.pc.in b/libdrm.pc.in
index b218d12..b46e2a6 100644
--- a/libdrm.pc.in
+++ b/libdrm.pc.in
@@ -7,4 +7,4 @@ Name: libdrm
Description: Userspace interface to kernel DRM services
Version: @PACKAGE_VERSION@
Libs: -L${libdir} -ldrm
-Cflags: -I${includedir} -I${includedir}/drm -I${includedir}/libdrm
+Cflags: -I${includedir} -I${includedir}/libdrm
commit bba2b58cbe1d8512ad35b951f4cfa52144c5e2fd
Author: Brice Goglin <bgog...@debian.org>
Date: Tue Apr 6 22:20:28 2010 +0200
Update libdrm-radeon1.symbols and shlibs.
diff --git a/debian/changelog b/debian/changelog
index 5c652e6..48020ef 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,7 +1,7 @@
libdrm (2.4.20-1) UNRELEASED; urgency=low
* New upstream release.
- * Update libdrm-intel1.symbols and shlibs.
+ * Update libdrm-intel1.symbols, libdrm-radeon1.symbols and shlibs.
* Disable libkms for now.
-- Brice Goglin <bgog...@debian.org> Tue, 06 Apr 2010 21:46:57 +0200
diff --git a/debian/libdrm-radeon1.symbols b/debian/libdrm-radeon1.symbols
index 12b1231..2cc83e9 100644
--- a/debian/libdrm-radeon1.symbols
+++ b/debian/libdrm-radeon1.symbols
@@ -21,6 +21,7 @@ libdrm_radeon.so.1 libdrm-radeon1 #MINVER#
radeon_cs_e...@base 2.4.17
radeon_cs_...@base 2.4.17
radeon_cs_er...@base 2.4.17
+ radeon_cs_get...@base 2.4.20
radeon_cs_manager_gem_c...@base 2.4.17
radeon_cs_manager_gem_d...@base 2.4.17
radeon_cs_need_fl...@base 2.4.17
@@ -33,5 +34,6 @@ libdrm_radeon.so.1 libdrm-radeon1 #MINVER#
radeon_cs_space_set_fl...@base 2.4.17
radeon_cs_write_re...@base 2.4.17
radeon_gem_get_kernel_n...@base 2.4.17
+ radeon_gem_get_reloc_in...@base 2.4.20
radeon_gem_name...@base 2.4.17
radeon_gem_set_dom...@base 2.4.17
diff --git a/debian/rules b/debian/rules
index acf03b6..41b99db 100755
--- a/debian/rules
+++ b/debian/rules
@@ -143,7 +143,7 @@ ifeq ($(NOUVEAU), yes)
dh_makeshlibs -plibdrm-nouveau1 -V'libdrm-nouveau1 (>= 2.4.16)' -- -c4
endif
ifeq ($(RADEON), yes)
- dh_makeshlibs -plibdrm-radeon1 -V'libdrm-radeon1 (>= 2.4.17)' -- -c4
+ dh_makeshlibs -plibdrm-radeon1 -V'libdrm-radeon1 (>= 2.4.20)' -- -c4
endif
dh_installdeb -s
dh_shlibdeps -s
commit 50d305e25d297eb6ab4b2b0221cdc22e77dd677e
Author: Brice Goglin <bgog...@debian.org>
Date: Tue Apr 6 22:17:10 2010 +0200
Update libdrm-intel1.symbols and shlibs.
diff --git a/debian/changelog b/debian/changelog
index af81559..5c652e6 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,7 @@
libdrm (2.4.20-1) UNRELEASED; urgency=low
* New upstream release.
+ * Update libdrm-intel1.symbols and shlibs.
* Disable libkms for now.
-- Brice Goglin <bgog...@debian.org> Tue, 06 Apr 2010 21:46:57 +0200
diff --git a/debian/libdrm-intel1.symbols b/debian/libdrm-intel1.symbols
index 71e8f02..68b9c37 100644
--- a/debian/libdrm-intel1.symbols
+++ b/debian/libdrm-intel1.symbols
@@ -5,6 +5,7 @@ libdrm_intel.so.1 libdrm-intel1 #MINVER#
drm_intel_bo_b...@base 2.4.13
drm_intel_bo_disable_re...@base 2.4.10
drm_intel_bo_emit_re...@base 2.4.1
+ drm_intel_bo_emit_reloc_fe...@base 2.4.20
drm_intel_bo_e...@base 2.4.1
drm_intel_bo_fake_alloc_sta...@base 2.4.1
drm_intel_bo_fake_disable_backing_st...@base 2.4.1
@@ -31,6 +32,7 @@ libdrm_intel.so.1 libdrm-intel1 #MINVER#
drm_intel_bufmgr_fake_set_exec_callb...@base 2.4.1
drm_intel_bufmgr_fake_set_fence_callb...@base 2.4.1
drm_intel_bufmgr_fake_set_last_dispa...@base 2.4.1
+ drm_intel_bufmgr_gem_enable_fenced_rel...@base 2.4.20
drm_intel_bufmgr_gem_enable_re...@base 2.4.1
drm_intel_bufmgr_gem_i...@base 2.4.1
drm_intel_bufmgr_set_de...@base 2.4.1
diff --git a/debian/rules b/debian/rules
index a799afc..acf03b6 100755
--- a/debian/rules
+++ b/debian/rules
@@ -137,7 +137,7 @@ endif
dh_fixperms -s
dh_makeshlibs -plibdrm2 -V'libdrm2 (>= 2.4.17)' -- -c4
ifeq ($(INTEL), yes)
- dh_makeshlibs -plibdrm-intel1 -V'libdrm-intel1 (>= 2.4.16)' -- -c4
+ dh_makeshlibs -plibdrm-intel1 -V'libdrm-intel1 (>= 2.4.20)' -- -c4
endif
ifeq ($(NOUVEAU), yes)
dh_makeshlibs -plibdrm-nouveau1 -V'libdrm-nouveau1 (>= 2.4.16)' -- -c4
commit 4039421e0b60cbb4adf563a28d973112113746bb
Author: Brice Goglin <bgog...@debian.org>
Date: Tue Apr 6 22:10:34 2010 +0200
Disable libkms for now
diff --git a/debian/changelog b/debian/changelog
index 16d5d81..af81559 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,7 @@
libdrm (2.4.20-1) UNRELEASED; urgency=low
* New upstream release.
+ * Disable libkms for now.
-- Brice Goglin <bgog...@debian.org> Tue, 06 Apr 2010 21:46:57 +0200
diff --git a/debian/rules b/debian/rules
index 471ea74..a799afc 100755
--- a/debian/rules
+++ b/debian/rules
@@ -17,6 +17,7 @@ DEB_HOST_GNU_TYPE ?= $(shell dpkg-architecture
-qDEB_HOST_GNU_TYPE)
DEB_BUILD_GNU_TYPE ?= $(shell dpkg-architecture -qDEB_BUILD_GNU_TYPE)
DEB_HOST_ARCH_OS ?= $(shell dpkg-architecture -qDEB_HOST_ARCH_OS)
+confflags += --disable-libkms
ifeq ($(DEB_BUILD_GNU_TYPE), $(DEB_HOST_GNU_TYPE))
confflags += --build=$(DEB_HOST_GNU_TYPE)
else
commit aa2d788d799b1c065b9ccf111a1fe1354a921cd3
Author: Brice Goglin <bgog...@debian.org>
Date: Tue Apr 6 21:48:37 2010 +0200
Update 03_revert_abi_change.diff
diff --git a/debian/patches/03_revert_abi_change.diff
b/debian/patches/03_revert_abi_change.diff
index 12dd8f6..63ddc3c 100644
--- a/debian/patches/03_revert_abi_change.diff
+++ b/debian/patches/03_revert_abi_change.diff
@@ -1,6 +1,9 @@
Revert nouveau ABI change to match what is in 2.6.33.
This reverts commits after b496c63143e9a4ca02011582329bce2df99d9b7c
+except those that only touch the build system:
+ e73af7f560c95ba9c665bead7fc8eb1471db9975
+ 976e779f9cd0571dd2c218580485b39d37bd18a0
diff --git a/include/drm/nouveau_drm.h b/include/drm/nouveau_drm.h
index a6a9f4a..f745948 100644
@@ -160,7 +163,7 @@ index a6a9f4a..f745948 100644
#endif /* __NOUVEAU_DRM_H__ */
diff --git a/nouveau/Makefile.am b/nouveau/Makefile.am
-index 5d759c5..70bbbb2 100644
+index b6d214a..217b7ef 100644
--- a/nouveau/Makefile.am
+++ b/nouveau/Makefile.am
@@ -18,8 +18,7 @@ libdrm_nouveau_la_SOURCES = \
@@ -182,13 +185,17 @@ index 5d759c5..70bbbb2 100644
+ nouveau_class.h
- libdrm_nouveauincludedir = ${includedir}/drm
+ libdrm_nouveauincludedir = ${includedir}/libdrm
diff --git a/nouveau/nouveau_bo.c b/nouveau/nouveau_bo.c
-index 4973636..10cc8a6 100644
+index 32b23b6..10cc8a6 100644
--- a/nouveau/nouveau_bo.c
+++ b/nouveau/nouveau_bo.c
-@@ -201,6 +201,14 @@ nouveau_bo_new_tile(struct nouveau_device *dev, uint32_t
flags, int align,
- nouveau_bo_ref(NULL, (void *)nvbo);
+@@ -198,9 +198,17 @@ nouveau_bo_new_tile(struct nouveau_device *dev, uint32_t
flags, int align,
+ if (flags & (NOUVEAU_BO_VRAM | NOUVEAU_BO_GART)) {
+ ret = nouveau_bo_kalloc(nvbo, NULL);
+ if (ret) {
+- nouveau_bo_ref(NULL, (void *)&nvbo);
++ nouveau_bo_ref(NULL, (void *)nvbo);
return ret;
}
+
@@ -346,6 +353,19 @@ index 1e77ab0..fdad63e 100644
nouveau_bo_busy(struct nouveau_bo *, uint32_t access);
uint32_t
+diff --git a/nouveau/nouveau_channel.c b/nouveau/nouveau_channel.c
+index 40a0b34..5622c1d 100644
+--- a/nouveau/nouveau_channel.c
++++ b/nouveau/nouveau_channel.c
+@@ -106,7 +106,7 @@ nouveau_channel_free(struct nouveau_channel **chan)
+ struct nouveau_channel_priv *nvchan;
+ struct nouveau_device_priv *nvdev;
+ struct drm_nouveau_channel_free cf;
+- unsigned i;
++ int i;
+
+ if (!chan || !*chan)
+ return;
diff --git a/nouveau/nouveau_channel.h b/nouveau/nouveau_channel.h
index ddcf8e4..294f749 100644
--- a/nouveau/nouveau_channel.h
@@ -365,6 +385,866 @@ index ddcf8e4..294f749 100644
struct nouveau_grobj *nullobj;
struct nouveau_grobj *vram;
struct nouveau_grobj *gart;
+diff --git a/nouveau/nouveau_class.h b/nouveau/nouveau_class.h
+index 0167cbc..8e7d0ff 100644
+--- a/nouveau/nouveau_class.h
++++ b/nouveau/nouveau_class.h
+@@ -1549,7 +1549,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV04_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_GOURAUD
0x00000080
+ #define NV04_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_PHONG
0x000000c0
+ #define NV04_TEXTURED_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE
(1 << 8)
+-#define NV04_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE
(1 << 12)
++#define NV04_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE_SHIFT
12
++#define NV04_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE_MASK
0x0000f000
+ #define NV04_TEXTURED_TRIANGLE_BLEND_FOG_ENABLE
(1 << 16)
+ #define NV04_TEXTURED_TRIANGLE_BLEND_BLEND_ENABLE
(1 << 20)
+ #define NV04_TEXTURED_TRIANGLE_BLEND_SRC_SHIFT
24
+@@ -1797,7 +1798,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV04_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_GOURAUD
0x00000080
+ #define NV04_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_PHONG
0x000000c0
+ #define NV04_MULTITEX_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE
(1 << 8)
+-#define NV04_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE
(1 << 12)
++#define NV04_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE_SHIFT
12
++#define NV04_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE_MASK
0x0000f000
+ #define NV04_MULTITEX_TRIANGLE_BLEND_FOG_ENABLE
(1 << 16)
+ #define NV04_MULTITEX_TRIANGLE_BLEND_BLEND_ENABLE
(1 << 20)
+ #define NV04_MULTITEX_TRIANGLE_BLEND_SRC_SHIFT
24
+@@ -1961,10 +1963,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV10TCL_TX_FORMAT_DMA1
(1 << 1)
+ #define NV10TCL_TX_FORMAT_CUBE_MAP
(1 << 2)
+ #define NV10TCL_TX_FORMAT_FORMAT_SHIFT
7
+-#define NV10TCL_TX_FORMAT_FORMAT_MASK
0x00000f80
++#define NV10TCL_TX_FORMAT_FORMAT_MASK
0x00000780
+ #define NV10TCL_TX_FORMAT_FORMAT_L8
0x00000000
+ #define NV10TCL_TX_FORMAT_FORMAT_A8
0x00000080
+ #define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5
0x00000100
++#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT
0x00000180
+ #define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4
0x00000200
+ #define NV10TCL_TX_FORMAT_FORMAT_R5G6B5
0x00000280
+ #define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8
0x00000300
+@@ -1976,7 +1979,25 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT
0x00000800
+ #define NV10TCL_TX_FORMAT_FORMAT_R5G6B5_RECT
0x00000880
+ #define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT
0x00000900
+-#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT
0x00000980
++#define NV10TCL_TX_FORMAT_FORMAT_L8_RECT
0x00000980
++#define NV10TCL_TX_FORMAT_FORMAT_A8L8
0x00000d00
++#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT2
0x00000d80
++#define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT
0x00000e80
++#define NV10TCL_TX_FORMAT_FORMAT_R8G8B8_RECT
0x00000f00
++#define NV10TCL_TX_FORMAT_FORMAT_L8A8_RECT
0x00001000
++#define NV10TCL_TX_FORMAT_FORMAT_DSDT
0x00001400
++#define NV10TCL_TX_FORMAT_FORMAT_A16
0x00001900
++#define NV10TCL_TX_FORMAT_FORMAT_HILO16
0x00001980
++#define NV10TCL_TX_FORMAT_FORMAT_A16_RECT
0x00001a80
++#define NV10TCL_TX_FORMAT_FORMAT_HILO16_RECT
0x00001b00
++#define NV10TCL_TX_FORMAT_FORMAT_HILO8
0x00002200
++#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8
0x00002280
++#define NV10TCL_TX_FORMAT_FORMAT_HILO8_RECT
0x00002300
++#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT
0x00002380
++#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV
0x00002500
++#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV
0x00002580
++#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV
0x00002600
++#define NV10TCL_TX_FORMAT_NPOT
(1 << 11)
+ #define NV10TCL_TX_FORMAT_MIPMAP
(1 << 15)
+ #define NV10TCL_TX_FORMAT_BASE_SIZE_U_SHIFT
16
+ #define NV10TCL_TX_FORMAT_BASE_SIZE_U_MASK
0x000f0000
+@@ -2617,7 +2638,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY
0xc0000000
+ #define NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE
0xe0000000
+ #define NV10TCL_LIGHT_MODEL
0x00000294
+-#define NV10TCL_LIGHT_MODEL_VERTEX_SPECULAR
(1 << 0)
+ #define NV10TCL_LIGHT_MODEL_SEPARATE_SPECULAR
(1 << 1)
+ #define NV10TCL_LIGHT_MODEL_LOCAL_VIEWER
(1 << 16)
+ #define NV10TCL_COLOR_MATERIAL
0x00000298
+@@ -2866,38 +2886,38 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV10TCL_ENABLED_LIGHTS_7_NONPOSITIONAL
0x00004000
+ #define NV10TCL_ENABLED_LIGHTS_7_POSITIONAL
0x00008000
+ #define NV10TCL_ENABLED_LIGHTS_7_DIRECTIONAL
0x0000c000
+-#define NV10TCL_TX_GEN_MODE_S(x)
(0x000003c0+((x)*16))
+-#define NV10TCL_TX_GEN_MODE_S__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_MODE_S_FALSE
0x00000000
+-#define NV10TCL_TX_GEN_MODE_S_EYE_LINEAR
0x00002400
+-#define NV10TCL_TX_GEN_MODE_S_OBJECT_LINEAR
0x00002401
+-#define NV10TCL_TX_GEN_MODE_S_SPHERE_MAP
0x00002402
+-#define NV10TCL_TX_GEN_MODE_S_NORMAL_MAP
0x00008511
+-#define NV10TCL_TX_GEN_MODE_S_REFLECTION_MAP
0x00008512
+-#define NV10TCL_TX_GEN_MODE_T(x)
(0x000003c4+((x)*16))
+-#define NV10TCL_TX_GEN_MODE_T__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_MODE_T_FALSE
0x00000000
+-#define NV10TCL_TX_GEN_MODE_T_EYE_LINEAR
0x00002400
+-#define NV10TCL_TX_GEN_MODE_T_OBJECT_LINEAR
0x00002401
+-#define NV10TCL_TX_GEN_MODE_T_SPHERE_MAP
0x00002402
+-#define NV10TCL_TX_GEN_MODE_T_NORMAL_MAP
0x00008511
+-#define NV10TCL_TX_GEN_MODE_T_REFLECTION_MAP
0x00008512
+-#define NV10TCL_TX_GEN_MODE_R(x)
(0x000003c8+((x)*16))
+-#define NV10TCL_TX_GEN_MODE_R__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_MODE_R_FALSE
0x00000000
+-#define NV10TCL_TX_GEN_MODE_R_EYE_LINEAR
0x00002400
+-#define NV10TCL_TX_GEN_MODE_R_OBJECT_LINEAR
0x00002401
+-#define NV10TCL_TX_GEN_MODE_R_SPHERE_MAP
0x00002402
+-#define NV10TCL_TX_GEN_MODE_R_NORMAL_MAP
0x00008511
+-#define NV10TCL_TX_GEN_MODE_R_REFLECTION_MAP
0x00008512
+-#define NV10TCL_TX_GEN_MODE_Q(x)
(0x000003cc+((x)*16))
+-#define NV10TCL_TX_GEN_MODE_Q__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_MODE_Q_FALSE
0x00000000
+-#define NV10TCL_TX_GEN_MODE_Q_EYE_LINEAR
0x00002400
+-#define NV10TCL_TX_GEN_MODE_Q_OBJECT_LINEAR
0x00002401
+-#define NV10TCL_TX_GEN_MODE_Q_SPHERE_MAP
0x00002402
+-#define NV10TCL_TX_GEN_MODE_Q_NORMAL_MAP
0x00008511
+-#define NV10TCL_TX_GEN_MODE_Q_REFLECTION_MAP
0x00008512
++#define NV10TCL_TX_GEN_S(x)
(0x000003c0+((x)*16))
++#define NV10TCL_TX_GEN_S__SIZE
0x00000002
++#define NV10TCL_TX_GEN_S_FALSE
0x00000000
++#define NV10TCL_TX_GEN_S_EYE_LINEAR
0x00002400
++#define NV10TCL_TX_GEN_S_OBJECT_LINEAR
0x00002401
++#define NV10TCL_TX_GEN_S_SPHERE_MAP
0x00002402
++#define NV10TCL_TX_GEN_S_NORMAL_MAP
0x00008511
++#define NV10TCL_TX_GEN_S_REFLECTION_MAP
0x00008512
++#define NV10TCL_TX_GEN_T(x)
(0x000003c4+((x)*16))
++#define NV10TCL_TX_GEN_T__SIZE
0x00000002
++#define NV10TCL_TX_GEN_T_FALSE
0x00000000
++#define NV10TCL_TX_GEN_T_EYE_LINEAR
0x00002400
++#define NV10TCL_TX_GEN_T_OBJECT_LINEAR
0x00002401
++#define NV10TCL_TX_GEN_T_SPHERE_MAP
0x00002402
++#define NV10TCL_TX_GEN_T_NORMAL_MAP
0x00008511
++#define NV10TCL_TX_GEN_T_REFLECTION_MAP
0x00008512
++#define NV10TCL_TX_GEN_R(x)
(0x000003c8+((x)*16))
++#define NV10TCL_TX_GEN_R__SIZE
0x00000002
++#define NV10TCL_TX_GEN_R_FALSE
0x00000000
++#define NV10TCL_TX_GEN_R_EYE_LINEAR
0x00002400
++#define NV10TCL_TX_GEN_R_OBJECT_LINEAR
0x00002401
++#define NV10TCL_TX_GEN_R_SPHERE_MAP
0x00002402
++#define NV10TCL_TX_GEN_R_NORMAL_MAP
0x00008511
++#define NV10TCL_TX_GEN_R_REFLECTION_MAP
0x00008512
++#define NV10TCL_TX_GEN_Q(x)
(0x000003cc+((x)*16))
++#define NV10TCL_TX_GEN_Q__SIZE
0x00000002
++#define NV10TCL_TX_GEN_Q_FALSE
0x00000000
++#define NV10TCL_TX_GEN_Q_EYE_LINEAR
0x00002400
++#define NV10TCL_TX_GEN_Q_OBJECT_LINEAR
0x00002401
++#define NV10TCL_TX_GEN_Q_SPHERE_MAP
0x00002402
++#define NV10TCL_TX_GEN_Q_NORMAL_MAP
0x00008511
++#define NV10TCL_TX_GEN_Q_REFLECTION_MAP
0x00008512
+ #define NV10TCL_TX_MATRIX_ENABLE(x)
(0x000003e0+((x)*4))
+ #define NV10TCL_TX_MATRIX_ENABLE__SIZE
0x00000002
+ #define NV10TCL_VIEW_MATRIX_ENABLE
0x000003e8
+@@ -2919,38 +2939,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV10TCL_TX0_MATRIX__SIZE
0x00000010
+ #define NV10TCL_TX1_MATRIX(x)
(0x00000580+((x)*4))
+ #define NV10TCL_TX1_MATRIX__SIZE
0x00000010
+-#define NV10TCL_TX_GEN_COEFF_S_A(x)
(0x00000600+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_S_A__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_S_B(x)
(0x00000604+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_S_B__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_S_C(x)
(0x00000608+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_S_C__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_S_D(x)
(0x0000060c+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_S_D__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_T_A(x)
(0x00000610+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_T_A__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_T_B(x)
(0x00000614+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_T_B__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_T_C(x)
(0x00000618+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_T_C__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_T_D(x)
(0x0000061c+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_T_D__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_R_A(x)
(0x00000620+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_R_A__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_R_B(x)
(0x00000624+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_R_B__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_R_C(x)
(0x00000628+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_R_C__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_R_D(x)
(0x0000062c+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_R_D__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_Q_A(x)
(0x00000630+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_Q_A__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_Q_B(x)
(0x00000634+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_Q_B__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_Q_C(x)
(0x00000638+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_Q_C__SIZE
0x00000002
+-#define NV10TCL_TX_GEN_COEFF_Q_D(x)
(0x0000063c+((x)*64))
+-#define NV10TCL_TX_GEN_COEFF_Q_D__SIZE
0x00000002
++#define NV10TCL_CLIP_PLANE_A(x)
(0x00000600+((x)*16))
++#define NV10TCL_CLIP_PLANE_A__SIZE
0x00000008
++#define NV10TCL_CLIP_PLANE_B(x)
(0x00000604+((x)*16))
++#define NV10TCL_CLIP_PLANE_B__SIZE
0x00000008
++#define NV10TCL_CLIP_PLANE_C(x)
(0x00000608+((x)*16))
++#define NV10TCL_CLIP_PLANE_C__SIZE
0x00000008
++#define NV10TCL_CLIP_PLANE_D(x)
(0x0000060c+((x)*16))
++#define NV10TCL_CLIP_PLANE_D__SIZE
0x00000008
+ #define NV10TCL_FOG_EQUATION_CONSTANT
0x00000680
+ #define NV10TCL_FOG_EQUATION_LINEAR
0x00000684
+ #define NV10TCL_FOG_EQUATION_QUADRATIC
0x00000688
+@@ -3126,6 +3122,70 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV10TCL_VTXFMT_STRIDE_SHIFT
8
+ #define NV10TCL_VTXFMT_STRIDE_MASK
0x0000ff00
+ #define NV10TCL_VTXFMT_POS_HOMOGENEOUS
(1 << 24)
++#define NV10TCL_VERTEX_ARRAY_OFFSET_POS
0x00000d00
++#define NV10TCL_VERTEX_ARRAY_FORMAT_POS
0x00000d04
++#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_TYPE_SHIFT
0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_TYPE_MASK
0x0000000f
++#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_FIELDS_SHIFT
4
++#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_FIELDS_MASK
0x000000f0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_STRIDE_SHIFT
8
++#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_STRIDE_MASK
0x0000ff00
++#define NV10TCL_VERTEX_ARRAY_OFFSET_COL
0x00000d08
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL
0x00000d0c
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_TYPE_SHIFT
0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_TYPE_MASK
0x0000000f
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_FIELDS_SHIFT
4
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_FIELDS_MASK
0x000000f0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_STRIDE_SHIFT
8
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_STRIDE_MASK
0x0000ff00
++#define NV10TCL_VERTEX_ARRAY_OFFSET_COL2
0x00000d10
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2
0x00000d14
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_TYPE_SHIFT
0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_TYPE_MASK
0x0000000f
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_FIELDS_SHIFT
4
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_FIELDS_MASK
0x000000f0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_STRIDE_SHIFT
8
++#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_STRIDE_MASK
0x0000ff00
++#define NV10TCL_VERTEX_ARRAY_OFFSET_TX0
0x00000d18
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0
0x00000d1c
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_TYPE_SHIFT
0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_TYPE_MASK
0x0000000f
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_FIELDS_SHIFT
4
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_FIELDS_MASK
0x000000f0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_STRIDE_SHIFT
8
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_STRIDE_MASK
0x0000ff00
++#define NV10TCL_VERTEX_ARRAY_OFFSET_TX1
0x00000d20
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1
0x00000d24
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_TYPE_SHIFT
0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_TYPE_MASK
0x0000000f
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_FIELDS_SHIFT
4
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_FIELDS_MASK
0x000000f0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_STRIDE_SHIFT
8
++#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_STRIDE_MASK
0x0000ff00
++#define NV10TCL_VERTEX_ARRAY_OFFSET_NOR
0x00000d28
++#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR
0x00000d2c
++#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_TYPE_SHIFT
0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_TYPE_MASK
0x0000000f
++#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_FIELDS_SHIFT
4
++#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_FIELDS_MASK
0x000000f0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_STRIDE_SHIFT
8
++#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_STRIDE_MASK
0x0000ff00
++#define NV10TCL_VERTEX_ARRAY_OFFSET_WGH
0x00000d30
++#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH
0x00000d34
++#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_TYPE_SHIFT
0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_TYPE_MASK
0x0000000f
++#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_FIELDS_SHIFT
4
++#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_FIELDS_MASK
0x000000f0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_STRIDE_SHIFT
8
++#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_STRIDE_MASK
0x0000ff00
++#define NV10TCL_VERTEX_ARRAY_OFFSET_FOG
0x00000d38
++#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG
0x00000d3c
++#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_TYPE_SHIFT
0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_TYPE_MASK
0x0000000f
++#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_FIELDS_SHIFT
4
++#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_FIELDS_MASK
0x000000f0
++#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_STRIDE_SHIFT
8
++#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_STRIDE_MASK
0x0000ff00
+ #define NV10TCL_VERTEX_BEGIN_END
0x00000dfc
+ #define NV10TCL_VERTEX_BEGIN_END_STOP
0x00000000
+ #define NV10TCL_VERTEX_BEGIN_END_POINTS
0x00000001
+@@ -3965,38 +4025,38 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV20TCL_ENABLED_LIGHTS_7_NONPOSITIONAL
0x00004000
+ #define NV20TCL_ENABLED_LIGHTS_7_POSITIONAL
0x00008000
+ #define NV20TCL_ENABLED_LIGHTS_7_DIRECTIONAL
0x0000c000
+-#define NV20TCL_TX_GEN_MODE_S(x)
(0x000003c0+((x)*16))
+-#define NV20TCL_TX_GEN_MODE_S__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_MODE_S_FALSE
0x00000000
+-#define NV20TCL_TX_GEN_MODE_S_EYE_LINEAR
0x00002400
+-#define NV20TCL_TX_GEN_MODE_S_OBJECT_LINEAR
0x00002401
+-#define NV20TCL_TX_GEN_MODE_S_SPHERE_MAP
0x00002402
+-#define NV20TCL_TX_GEN_MODE_S_NORMAL_MAP
0x00008511
+-#define NV20TCL_TX_GEN_MODE_S_REFLECTION_MAP
0x00008512
+-#define NV20TCL_TX_GEN_MODE_T(x)
(0x000003c4+((x)*16))
+-#define NV20TCL_TX_GEN_MODE_T__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_MODE_T_FALSE
0x00000000
+-#define NV20TCL_TX_GEN_MODE_T_EYE_LINEAR
0x00002400
+-#define NV20TCL_TX_GEN_MODE_T_OBJECT_LINEAR
0x00002401
+-#define NV20TCL_TX_GEN_MODE_T_SPHERE_MAP
0x00002402
+-#define NV20TCL_TX_GEN_MODE_T_NORMAL_MAP
0x00008511
+-#define NV20TCL_TX_GEN_MODE_T_REFLECTION_MAP
0x00008512
+-#define NV20TCL_TX_GEN_MODE_R(x)
(0x000003c8+((x)*16))
+-#define NV20TCL_TX_GEN_MODE_R__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_MODE_R_FALSE
0x00000000
+-#define NV20TCL_TX_GEN_MODE_R_EYE_LINEAR
0x00002400
+-#define NV20TCL_TX_GEN_MODE_R_OBJECT_LINEAR
0x00002401
+-#define NV20TCL_TX_GEN_MODE_R_SPHERE_MAP
0x00002402
+-#define NV20TCL_TX_GEN_MODE_R_NORMAL_MAP
0x00008511
+-#define NV20TCL_TX_GEN_MODE_R_REFLECTION_MAP
0x00008512
+-#define NV20TCL_TX_GEN_MODE_Q(x)
(0x000003cc+((x)*16))
+-#define NV20TCL_TX_GEN_MODE_Q__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_MODE_Q_FALSE
0x00000000
+-#define NV20TCL_TX_GEN_MODE_Q_EYE_LINEAR
0x00002400
+-#define NV20TCL_TX_GEN_MODE_Q_OBJECT_LINEAR
0x00002401
+-#define NV20TCL_TX_GEN_MODE_Q_SPHERE_MAP
0x00002402
+-#define NV20TCL_TX_GEN_MODE_Q_NORMAL_MAP
0x00008511
+-#define NV20TCL_TX_GEN_MODE_Q_REFLECTION_MAP
0x00008512
++#define NV20TCL_TX_GEN_S(x)
(0x000003c0+((x)*16))
++#define NV20TCL_TX_GEN_S__SIZE
0x00000004
++#define NV20TCL_TX_GEN_S_FALSE
0x00000000
++#define NV20TCL_TX_GEN_S_EYE_LINEAR
0x00002400
++#define NV20TCL_TX_GEN_S_OBJECT_LINEAR
0x00002401
++#define NV20TCL_TX_GEN_S_SPHERE_MAP
0x00002402
++#define NV20TCL_TX_GEN_S_NORMAL_MAP
0x00008511
++#define NV20TCL_TX_GEN_S_REFLECTION_MAP
0x00008512
++#define NV20TCL_TX_GEN_T(x)
(0x000003c4+((x)*16))
++#define NV20TCL_TX_GEN_T__SIZE
0x00000004
++#define NV20TCL_TX_GEN_T_FALSE
0x00000000
++#define NV20TCL_TX_GEN_T_EYE_LINEAR
0x00002400
++#define NV20TCL_TX_GEN_T_OBJECT_LINEAR
0x00002401
++#define NV20TCL_TX_GEN_T_SPHERE_MAP
0x00002402
++#define NV20TCL_TX_GEN_T_NORMAL_MAP
0x00008511
++#define NV20TCL_TX_GEN_T_REFLECTION_MAP
0x00008512
++#define NV20TCL_TX_GEN_R(x)
(0x000003c8+((x)*16))
++#define NV20TCL_TX_GEN_R__SIZE
0x00000004
++#define NV20TCL_TX_GEN_R_FALSE
0x00000000
++#define NV20TCL_TX_GEN_R_EYE_LINEAR
0x00002400
++#define NV20TCL_TX_GEN_R_OBJECT_LINEAR
0x00002401
++#define NV20TCL_TX_GEN_R_SPHERE_MAP
0x00002402
++#define NV20TCL_TX_GEN_R_NORMAL_MAP
0x00008511
++#define NV20TCL_TX_GEN_R_REFLECTION_MAP
0x00008512
++#define NV20TCL_TX_GEN_Q(x)
(0x000003cc+((x)*16))
++#define NV20TCL_TX_GEN_Q__SIZE
0x00000004
++#define NV20TCL_TX_GEN_Q_FALSE
0x00000000
++#define NV20TCL_TX_GEN_Q_EYE_LINEAR
0x00002400
++#define NV20TCL_TX_GEN_Q_OBJECT_LINEAR
0x00002401
++#define NV20TCL_TX_GEN_Q_SPHERE_MAP
0x00002402
++#define NV20TCL_TX_GEN_Q_NORMAL_MAP
0x00008511
++#define NV20TCL_TX_GEN_Q_REFLECTION_MAP
0x00008512
+ #define NV20TCL_TX_MATRIX_ENABLE(x)
(0x00000420+((x)*4))
+ #define NV20TCL_TX_MATRIX_ENABLE__SIZE
0x00000004
+ #define NV20TCL_POINT_SIZE
0x0000043c
+@@ -4026,38 +4086,38 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV20TCL_TX2_MATRIX__SIZE
0x00000010
+ #define NV20TCL_TX3_MATRIX(x)
(0x00000780+((x)*4))
+ #define NV20TCL_TX3_MATRIX__SIZE
0x00000010
+-#define NV20TCL_TX_GEN_COEFF_S_A(x)
(0x00000840+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_S_A__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_S_B(x)
(0x00000844+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_S_B__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_S_C(x)
(0x00000848+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_S_C__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_S_D(x)
(0x0000084c+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_S_D__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_T_A(x)
(0x00000850+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_T_A__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_T_B(x)
(0x00000854+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_T_B__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_T_C(x)
(0x00000858+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_T_C__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_T_D(x)
(0x0000085c+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_T_D__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_R_A(x)
(0x00000860+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_R_A__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_R_B(x)
(0x00000864+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_R_B__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_R_C(x)
(0x00000868+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_R_C__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_R_D(x)
(0x0000086c+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_R_D__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_Q_A(x)
(0x00000870+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_Q_A__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_Q_B(x)
(0x00000874+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_Q_B__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_Q_C(x)
(0x00000878+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_Q_C__SIZE
0x00000004
+-#define NV20TCL_TX_GEN_COEFF_Q_D(x)
(0x0000087c+((x)*64))
+-#define NV20TCL_TX_GEN_COEFF_Q_D__SIZE
0x00000004
++#define NV20TCL_TX0_CLIP_PLANE_A(x)
(0x00000840+((x)*16))
++#define NV20TCL_TX0_CLIP_PLANE_A__SIZE
0x00000004
++#define NV20TCL_TX0_CLIP_PLANE_B(x)
(0x00000844+((x)*16))
++#define NV20TCL_TX0_CLIP_PLANE_B__SIZE
0x00000004
++#define NV20TCL_TX0_CLIP_PLANE_C(x)
(0x00000848+((x)*16))
++#define NV20TCL_TX0_CLIP_PLANE_C__SIZE
0x00000004
++#define NV20TCL_TX0_CLIP_PLANE_D(x)
(0x0000084c+((x)*16))
++#define NV20TCL_TX0_CLIP_PLANE_D__SIZE
0x00000004
++#define NV20TCL_TX1_CLIP_PLANE_A(x)
(0x00000880+((x)*16))
++#define NV20TCL_TX1_CLIP_PLANE_A__SIZE
0x00000004
++#define NV20TCL_TX1_CLIP_PLANE_B(x)
(0x00000884+((x)*16))
++#define NV20TCL_TX1_CLIP_PLANE_B__SIZE
0x00000004
++#define NV20TCL_TX1_CLIP_PLANE_C(x)
(0x00000888+((x)*16))
++#define NV20TCL_TX1_CLIP_PLANE_C__SIZE
0x00000004
++#define NV20TCL_TX1_CLIP_PLANE_D(x)
(0x0000088c+((x)*16))
++#define NV20TCL_TX1_CLIP_PLANE_D__SIZE
0x00000004
++#define NV20TCL_TX2_CLIP_PLANE_A(x)
(0x000008c0+((x)*16))
++#define NV20TCL_TX2_CLIP_PLANE_A__SIZE
0x00000004
++#define NV20TCL_TX2_CLIP_PLANE_B(x)
(0x000008c4+((x)*16))
++#define NV20TCL_TX2_CLIP_PLANE_B__SIZE
0x00000004
++#define NV20TCL_TX2_CLIP_PLANE_C(x)
(0x000008c8+((x)*16))
++#define NV20TCL_TX2_CLIP_PLANE_C__SIZE
0x00000004
++#define NV20TCL_TX2_CLIP_PLANE_D(x)
(0x000008cc+((x)*16))
++#define NV20TCL_TX2_CLIP_PLANE_D__SIZE
0x00000004
++#define NV20TCL_TX3_CLIP_PLANE_A(x)
(0x00000900+((x)*16))
++#define NV20TCL_TX3_CLIP_PLANE_A__SIZE
0x00000004
++#define NV20TCL_TX3_CLIP_PLANE_B(x)
(0x00000904+((x)*16))
++#define NV20TCL_TX3_CLIP_PLANE_B__SIZE
0x00000004
++#define NV20TCL_TX3_CLIP_PLANE_C(x)
(0x00000908+((x)*16))
++#define NV20TCL_TX3_CLIP_PLANE_C__SIZE
0x00000004
++#define NV20TCL_TX3_CLIP_PLANE_D(x)
(0x0000090c+((x)*16))
++#define NV20TCL_TX3_CLIP_PLANE_D__SIZE
0x00000004
+ #define NV20TCL_FOG_EQUATION_CONSTANT
0x000009c0
+ #define NV20TCL_FOG_EQUATION_LINEAR
0x000009c4
+ #define NV20TCL_FOG_EQUATION_QUADRATIC
0x000009c8
+@@ -4286,17 +4346,17 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV20TCL_LIGHT_BACK_AMBIENT_G__SIZE
0x00000008
+ #define NV20TCL_LIGHT_BACK_AMBIENT_B(x)
(0x00000c08+((x)*64))
+ #define NV20TCL_LIGHT_BACK_AMBIENT_B__SIZE
0x00000008
+-#define NV20TCL_LIGHT_BACK_DIFFUSE_R(x)
(0x00000c0c+((x)*64))
++#define NV20TCL_LIGHT_BACK_DIFFUSE_R(x)
(0x00000c0c+((x)*128))
+ #define NV20TCL_LIGHT_BACK_DIFFUSE_R__SIZE
0x00000008
+-#define NV20TCL_LIGHT_BACK_DIFFUSE_G(x)
(0x00000c10+((x)*64))
++#define NV20TCL_LIGHT_BACK_DIFFUSE_G(x)
(0x00000c10+((x)*128))
+ #define NV20TCL_LIGHT_BACK_DIFFUSE_G__SIZE
0x00000008
+-#define NV20TCL_LIGHT_BACK_DIFFUSE_B(x)
(0x00000c14+((x)*64))
++#define NV20TCL_LIGHT_BACK_DIFFUSE_B(x)
(0x00000c14+((x)*128))
+ #define NV20TCL_LIGHT_BACK_DIFFUSE_B__SIZE
0x00000008
+-#define NV20TCL_LIGHT_BACK_SPECULAR_R(x)
(0x00000c18+((x)*64))
++#define NV20TCL_LIGHT_BACK_SPECULAR_R(x)
(0x00000c18+((x)*128))
+ #define NV20TCL_LIGHT_BACK_SPECULAR_R__SIZE
0x00000008
+-#define NV20TCL_LIGHT_BACK_SPECULAR_G(x)
(0x00000c1c+((x)*64))
++#define NV20TCL_LIGHT_BACK_SPECULAR_G(x)
(0x00000c1c+((x)*128))
+ #define NV20TCL_LIGHT_BACK_SPECULAR_G__SIZE
0x00000008
+-#define NV20TCL_LIGHT_BACK_SPECULAR_B(x)
(0x00000c20+((x)*64))
++#define NV20TCL_LIGHT_BACK_SPECULAR_B(x)
(0x00000c20+((x)*128))
+ #define NV20TCL_LIGHT_BACK_SPECULAR_B__SIZE
0x00000008
+ #define NV20TCL_LIGHT_FRONT_AMBIENT_R(x)
(0x00001000+((x)*128))
+ #define NV20TCL_LIGHT_FRONT_AMBIENT_R__SIZE
0x00000008
+@@ -4641,6 +4701,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV20TCL_TX_FORMAT_FORMAT_L8
0x00000000
+ #define NV20TCL_TX_FORMAT_FORMAT_A8
0x00000100
+ #define NV20TCL_TX_FORMAT_FORMAT_A1R5G5B5
0x00000200
++#define NV20TCL_TX_FORMAT_FORMAT_A8_RECT
0x00000300
+ #define NV20TCL_TX_FORMAT_FORMAT_A4R4G4B4
0x00000400
+ #define NV20TCL_TX_FORMAT_FORMAT_R5G6B5
0x00000500
+ #define NV20TCL_TX_FORMAT_FORMAT_A8R8G8B8
0x00000600
+@@ -4653,21 +4714,20 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV20TCL_TX_FORMAT_FORMAT_R5G6B5_RECT
0x00001100
+ #define NV20TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT
0x00001200
+ #define NV20TCL_TX_FORMAT_FORMAT_L8_RECT
0x00001300
+-#define NV20TCL_TX_FORMAT_FORMAT_DSDT8_RECT
0x00001700
+ #define NV20TCL_TX_FORMAT_FORMAT_A8L8
0x00001a00
+-#define NV20TCL_TX_FORMAT_FORMAT_A8_RECT
0x00001b00
++#define NV20TCL_TX_FORMAT_FORMAT_A8_RECT2
0x00001b00
+ #define NV20TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT
0x00001d00
+ #define NV20TCL_TX_FORMAT_FORMAT_R8G8B8_RECT
0x00001e00
+-#define NV20TCL_TX_FORMAT_FORMAT_A8L8_RECT
0x00002000
+-#define NV20TCL_TX_FORMAT_FORMAT_DSDT8
0x00002800
++#define NV20TCL_TX_FORMAT_FORMAT_L8A8_RECT
0x00002000
++#define NV20TCL_TX_FORMAT_FORMAT_DSDT
0x00002800
++#define NV20TCL_TX_FORMAT_FORMAT_A16
0x00003200
+ #define NV20TCL_TX_FORMAT_FORMAT_HILO16
0x00003300
++#define NV20TCL_TX_FORMAT_FORMAT_A16_RECT
0x00003500
+ #define NV20TCL_TX_FORMAT_FORMAT_HILO16_RECT
0x00003600
+ #define NV20TCL_TX_FORMAT_FORMAT_HILO8
0x00004400
+ #define NV20TCL_TX_FORMAT_FORMAT_SIGNED_HILO8
0x00004500
+ #define NV20TCL_TX_FORMAT_FORMAT_HILO8_RECT
0x00004600
+ #define NV20TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT
0x00004700
+-#define NV20TCL_TX_FORMAT_FORMAT_A16
0x00003200
+-#define NV20TCL_TX_FORMAT_FORMAT_A16_RECT
0x00003500
+ #define NV20TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV
0x00004a00
+ #define NV20TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV
0x00004b00
+ #define NV20TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV
0x00004c00
+@@ -4714,10 +4774,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV20TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT
26
+ #define NV20TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK
0x3c000000
+ #define NV20TCL_TX_ENABLE_ENABLE
(1 << 30)
+-#define NV20TCL_TX_NPOT_PITCH(x)
(0x00001b10+((x)*64))
+-#define NV20TCL_TX_NPOT_PITCH__SIZE
0x00000004
+-#define NV20TCL_TX_NPOT_PITCH_PITCH_SHIFT
16
+-#define NV20TCL_TX_NPOT_PITCH_PITCH_MASK
0xffff0000
++#define NV20TCL_TX_SWIZZLE(x)
(0x00001b10+((x)*64))
++#define NV20TCL_TX_SWIZZLE__SIZE
0x00000004
++#define NV20TCL_TX_SWIZZLE_RECT_PITCH_SHIFT
16
++#define NV20TCL_TX_SWIZZLE_RECT_PITCH_MASK
0xffff0000
+ #define NV20TCL_TX_FILTER(x)
(0x00001b14+((x)*64))
+ #define NV20TCL_TX_FILTER__SIZE
0x00000004
+ #define NV20TCL_TX_FILTER_LOD_BIAS_SHIFT
8
+@@ -5157,49 +5217,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV34TCL_COLOR_MASK_R_MASK
0x00ff0000
+ #define NV34TCL_COLOR_MASK_A_SHIFT
24
+ #define NV34TCL_COLOR_MASK_A_MASK
0xff000000
+-#define NV34TCL_STENCIL_FRONT_ENABLE
0x00000328
+-#define NV34TCL_STENCIL_FRONT_MASK
0x0000032c
+-#define NV34TCL_STENCIL_FRONT_FUNC_FUNC
0x00000330
+-#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_NEVER
0x00000200
+-#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_LESS
0x00000201
+-#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL
0x00000202
+-#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL
0x00000203
+-#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GREATER
0x00000204
+-#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL
0x00000205
+-#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL
0x00000206
+-#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS
0x00000207
+-#define NV34TCL_STENCIL_FRONT_FUNC_REF
0x00000334
+-#define NV34TCL_STENCIL_FRONT_FUNC_MASK
0x00000338
+-#define NV34TCL_STENCIL_FRONT_OP_FAIL
0x0000033c
+-#define NV34TCL_STENCIL_FRONT_OP_FAIL_ZERO
0x00000000
+-#define NV34TCL_STENCIL_FRONT_OP_FAIL_INVERT
0x0000150a
+-#define NV34TCL_STENCIL_FRONT_OP_FAIL_KEEP
0x00001e00
+-#define NV34TCL_STENCIL_FRONT_OP_FAIL_REPLACE
0x00001e01
+-#define NV34TCL_STENCIL_FRONT_OP_FAIL_INCR
0x00001e02
+-#define NV34TCL_STENCIL_FRONT_OP_FAIL_DECR
0x00001e03
+-#define NV34TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP
0x00008507
+-#define NV34TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP
0x00008508
+-#define NV34TCL_STENCIL_FRONT_OP_ZFAIL
0x00000340
+-#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_ZERO
0x00000000
+-#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INVERT
0x0000150a
+-#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_KEEP
0x00001e00
+-#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE
0x00001e01
+-#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR
0x00001e02
+-#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR
0x00001e03
+-#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP
0x00008507
+-#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP
0x00008508
+-#define NV34TCL_STENCIL_FRONT_OP_ZPASS
0x00000344
+-#define NV34TCL_STENCIL_FRONT_OP_ZPASS_ZERO
0x00000000
+-#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INVERT
0x0000150a
+-#define NV34TCL_STENCIL_FRONT_OP_ZPASS_KEEP
0x00001e00
+-#define NV34TCL_STENCIL_FRONT_OP_ZPASS_REPLACE
0x00001e01
+-#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR
0x00001e02
+-#define NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR
0x00001e03
+-#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP
0x00008507
+-#define NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP
0x00008508
+-#define NV34TCL_STENCIL_BACK_ENABLE
0x00000348
+-#define NV34TCL_STENCIL_BACK_MASK
0x0000034c
+-#define NV34TCL_STENCIL_BACK_FUNC_FUNC
0x00000350
++#define NV34TCL_STENCIL_BACK_ENABLE
0x00000328
++#define NV34TCL_STENCIL_BACK_MASK
0x0000032c
++#define NV34TCL_STENCIL_BACK_FUNC_FUNC
0x00000330
+ #define NV34TCL_STENCIL_BACK_FUNC_FUNC_NEVER
0x00000200
+ #define NV34TCL_STENCIL_BACK_FUNC_FUNC_LESS
0x00000201
+ #define NV34TCL_STENCIL_BACK_FUNC_FUNC_EQUAL
0x00000202
+@@ -5208,9 +5228,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV34TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL
0x00000205
+ #define NV34TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL
0x00000206
+ #define NV34TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS
0x00000207
+-#define NV34TCL_STENCIL_BACK_FUNC_REF
0x00000354
+-#define NV34TCL_STENCIL_BACK_FUNC_MASK
0x00000358
+-#define NV34TCL_STENCIL_BACK_OP_FAIL
0x0000035c
++#define NV34TCL_STENCIL_BACK_FUNC_REF
0x00000334
++#define NV34TCL_STENCIL_BACK_FUNC_MASK
0x00000338
++#define NV34TCL_STENCIL_BACK_OP_FAIL
0x0000033c
+ #define NV34TCL_STENCIL_BACK_OP_FAIL_ZERO
0x00000000
+ #define NV34TCL_STENCIL_BACK_OP_FAIL_INVERT
0x0000150a
+ #define NV34TCL_STENCIL_BACK_OP_FAIL_KEEP
0x00001e00
+@@ -5219,7 +5239,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV34TCL_STENCIL_BACK_OP_FAIL_DECR
0x00001e03
+ #define NV34TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP
0x00008507
+ #define NV34TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP
0x00008508
+-#define NV34TCL_STENCIL_BACK_OP_ZFAIL
0x00000360
++#define NV34TCL_STENCIL_BACK_OP_ZFAIL
0x00000340
+ #define NV34TCL_STENCIL_BACK_OP_ZFAIL_ZERO
0x00000000
+ #define NV34TCL_STENCIL_BACK_OP_ZFAIL_INVERT
0x0000150a
+ #define NV34TCL_STENCIL_BACK_OP_ZFAIL_KEEP
0x00001e00
+@@ -5228,7 +5248,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV34TCL_STENCIL_BACK_OP_ZFAIL_DECR
0x00001e03
+ #define NV34TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP
0x00008507
+ #define NV34TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP
0x00008508
+-#define NV34TCL_STENCIL_BACK_OP_ZPASS
0x00000364
++#define NV34TCL_STENCIL_BACK_OP_ZPASS
0x00000344
+ #define NV34TCL_STENCIL_BACK_OP_ZPASS_ZERO
0x00000000
+ #define NV34TCL_STENCIL_BACK_OP_ZPASS_INVERT
0x0000150a
+ #define NV34TCL_STENCIL_BACK_OP_ZPASS_KEEP
0x00001e00
+@@ -5237,6 +5257,46 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV34TCL_STENCIL_BACK_OP_ZPASS_DECR
0x00001e03
+ #define NV34TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP
0x00008507
+ #define NV34TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP
0x00008508
++#define NV34TCL_STENCIL_FRONT_ENABLE
0x00000348
++#define NV34TCL_STENCIL_FRONT_MASK
0x0000034c
++#define NV34TCL_STENCIL_FRONT_FUNC_FUNC
0x00000350
++#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_NEVER
0x00000200
++#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_LESS
0x00000201
++#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL
0x00000202
++#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL
0x00000203
++#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GREATER
0x00000204
++#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL
0x00000205
++#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL
0x00000206
++#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS
0x00000207
++#define NV34TCL_STENCIL_FRONT_FUNC_REF
0x00000354
++#define NV34TCL_STENCIL_FRONT_FUNC_MASK
0x00000358
++#define NV34TCL_STENCIL_FRONT_OP_FAIL
0x0000035c
++#define NV34TCL_STENCIL_FRONT_OP_FAIL_ZERO
0x00000000
++#define NV34TCL_STENCIL_FRONT_OP_FAIL_INVERT
0x0000150a
++#define NV34TCL_STENCIL_FRONT_OP_FAIL_KEEP
0x00001e00
++#define NV34TCL_STENCIL_FRONT_OP_FAIL_REPLACE
0x00001e01
++#define NV34TCL_STENCIL_FRONT_OP_FAIL_INCR
0x00001e02
++#define NV34TCL_STENCIL_FRONT_OP_FAIL_DECR
0x00001e03
++#define NV34TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP
0x00008507
++#define NV34TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP
0x00008508
++#define NV34TCL_STENCIL_FRONT_OP_ZFAIL
0x00000360
++#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_ZERO
0x00000000
++#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INVERT
0x0000150a
++#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_KEEP
0x00001e00
++#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE
0x00001e01
++#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR
0x00001e02
++#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR
0x00001e03
++#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP
0x00008507
++#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP
0x00008508
++#define NV34TCL_STENCIL_FRONT_OP_ZPASS
0x00000364
++#define NV34TCL_STENCIL_FRONT_OP_ZPASS_ZERO
0x00000000
++#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INVERT
0x0000150a
++#define NV34TCL_STENCIL_FRONT_OP_ZPASS_KEEP
0x00001e00
++#define NV34TCL_STENCIL_FRONT_OP_ZPASS_REPLACE
0x00001e01
++#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR
0x00001e02
++#define NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR
0x00001e03
++#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP
0x00008507
++#define NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP
0x00008508
+ #define NV34TCL_SHADE_MODEL
0x00000368
+ #define NV34TCL_SHADE_MODEL_FLAT
0x00001d00
+ #define NV34TCL_SHADE_MODEL_SMOOTH
0x00001d01
+@@ -6156,6 +6216,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE3
(1 << 13)
+ #define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE4
(1 << 17)
+ #define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE5
(1 << 21)
++#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE6
(1 << 25)
++#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE7
(1 << 29)
+ #define NV34TCL_POLYGON_STIPPLE_ENABLE
0x0000147c
+ #define NV34TCL_POLYGON_STIPPLE_PATTERN(x)
(0x00001480+((x)*4))
+ #define NV34TCL_POLYGON_STIPPLE_PATTERN__SIZE
0x00000020
+@@ -6257,7 +6319,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV34TCL_POLYGON_SMOOTH_ENABLE
0x00001838
+ #define NV34TCL_CULL_FACE_ENABLE
0x0000183c
+ #define NV34TCL_TX_PALETTE_OFFSET(x)
(0x00001840+((x)*4))
+-#define NV34TCL_TX_PALETTE_OFFSET__SIZE
0x00000008
++#define NV34TCL_TX_PALETTE_OFFSET__SIZE
0x00000004
+ #define NV34TCL_VTX_ATTR_2F_X(x)
(0x00001880+((x)*8))
+ #define NV34TCL_VTX_ATTR_2F_X__SIZE
0x00000010
+ #define NV34TCL_VTX_ATTR_2F_Y(x)
(0x00001884+((x)*8))
+@@ -6291,9 +6353,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV34TCL_VTX_ATTR_4I_ZW_W_SHIFT
16
+ #define NV34TCL_VTX_ATTR_4I_ZW_W_MASK
0xffff0000
+ #define NV34TCL_TX_OFFSET(x)
(0x00001a00+((x)*32))
+-#define NV34TCL_TX_OFFSET__SIZE
0x00000008
++#define NV34TCL_TX_OFFSET__SIZE
0x00000004
+ #define NV34TCL_TX_FORMAT(x)
(0x00001a04+((x)*32))
+-#define NV34TCL_TX_FORMAT__SIZE
0x00000008
++#define NV34TCL_TX_FORMAT__SIZE
0x00000004
+ #define NV34TCL_TX_FORMAT_DMA0
(1 << 0)
+ #define NV34TCL_TX_FORMAT_DMA1
(1 << 1)
+ #define NV34TCL_TX_FORMAT_CUBIC
(1 << 2)
+@@ -6308,6 +6370,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV34TCL_TX_FORMAT_FORMAT_L8
0x00000000
+ #define NV34TCL_TX_FORMAT_FORMAT_A8
0x00000100
+ #define NV34TCL_TX_FORMAT_FORMAT_A1R5G5B5
0x00000200
++#define NV34TCL_TX_FORMAT_FORMAT_A8_RECT
0x00000300
+ #define NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4
0x00000400
+ #define NV34TCL_TX_FORMAT_FORMAT_R5G6B5
0x00000500
+ #define NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8
0x00000600
+@@ -6320,21 +6383,20 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
+ #define NV34TCL_TX_FORMAT_FORMAT_R5G6B5_RECT
0x00001100
+ #define NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT
0x00001200
+ #define NV34TCL_TX_FORMAT_FORMAT_L8_RECT
0x00001300
+-#define NV34TCL_TX_FORMAT_FORMAT_DSDT8_RECT
0x00001700
+ #define NV34TCL_TX_FORMAT_FORMAT_A8L8
0x00001a00
+-#define NV34TCL_TX_FORMAT_FORMAT_A8_RECT
0x00001b00
++#define NV34TCL_TX_FORMAT_FORMAT_A8_RECT2
0x00001b00
+ #define NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT
0x00001d00
+ #define NV34TCL_TX_FORMAT_FORMAT_R8G8B8_RECT
0x00001e00
+-#define NV34TCL_TX_FORMAT_FORMAT_A8L8_RECT
0x00002000
+-#define NV34TCL_TX_FORMAT_FORMAT_DSDT8
0x00002800
++#define NV34TCL_TX_FORMAT_FORMAT_L8A8_RECT
0x00002000
++#define NV34TCL_TX_FORMAT_FORMAT_DSDT
0x00002800
++#define NV34TCL_TX_FORMAT_FORMAT_A16
0x00003200
+ #define NV34TCL_TX_FORMAT_FORMAT_HILO16
0x00003300
++#define NV34TCL_TX_FORMAT_FORMAT_A16_RECT
0x00003500
+ #define NV34TCL_TX_FORMAT_FORMAT_HILO16_RECT
0x00003600
+ #define NV34TCL_TX_FORMAT_FORMAT_HILO8
0x00004400
+ #define NV34TCL_TX_FORMAT_FORMAT_SIGNED_HILO8
0x00004500
+ #define NV34TCL_TX_FORMAT_FORMAT_HILO8_RECT
0x00004600
--
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