reassign 575681 linux-2.6
kthxbye
On Thu, 2010-04-01 at 09:32 +0200, Fabian Greffrath wrote:
> Am 31.03.2010 14:34, schrieb Michel Dänzer:
> > Not sure how it could be. Your symptoms are really weird. One thing I
> > wonder:
> > [ 6.093152] [drm] radeon: 2 quad pipes, 1 Z pipes initialized.
> > Maybe only one of your quad pipes is working properly? I think that
> > might explain the checkerboard pattern.
>
> Hm, no idea what this means. Is there anything I can do about it?
Looking at the Mesa code confirmed my suspicion, the attached kernel
patch should fix it. Reassigning to the kernel.
> > There's no mode switch if X and the console are using the same mode, but
> > that's probably not the case since you're using a custom modeline.
>
> I meant, maybe it is a "problem" that I have forced a different
> resolution in X than the one the kernel wants to set (and actually
> does in the VTs) via KMS.
I understood that and said this was unlikely: the artifacts looked to be
related to the rendering engine, and the display engine is generally
completely separate from that.
--
Earthling Michel Dänzer | http://www.vmware.com
Libre software enthusiast | Debian, X and DRI developer
From ac8c8618c625039ec29870c2a9c36733695ecd56 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <daen...@vmware.com>
Date: Thu, 1 Apr 2010 10:18:09 +0200
Subject: [PATCH] drm/radeon: R300 AD only has one quad pipe.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Gleaned from the Mesa code.
Signed-off-by: Michel Dänzer <daen...@vmware.com>
---
drivers/gpu/drm/radeon/r300.c | 6 +++---
drivers/gpu/drm/radeon/radeon_cp.c | 10 ++++++----
2 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 219d410..3dae012 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -327,12 +327,12 @@ void r300_gpu_init(struct radeon_device *rdev)
{
uint32_t gb_tile_config, tmp;
- /* FIXME: rv380 one pipes ? */
- if ((rdev->family == CHIP_R300) || (rdev->family == CHIP_R350)) {
+ if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) ||
+ (rdev->family == CHIP_R350)) {
/* r300,r350 */
rdev->num_gb_pipes = 2;
} else {
- /* rv350,rv370,rv380 */
+ /* rv350,rv370,rv380,r300 AD */
rdev->num_gb_pipes = 1;
}
rdev->num_z_pipes = 1;
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index dc6eba6..419630d 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -417,8 +417,9 @@ static int radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv)
return -EBUSY;
}
-static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
+static void radeon_init_pipes(struct drm_device *dev)
{
+ drm_radeon_private_t *dev_priv = dev->dev_private;
uint32_t gb_tile_config, gb_pipe_sel = 0;
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) {
@@ -436,11 +437,12 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;
} else {
/* R3xx */
- if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) ||
+ if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300 &&
+ dev->pdev->device != 0x4144) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) {
dev_priv->num_gb_pipes = 2;
} else {
- /* R3Vxx */
+ /* RV3xx/R300 AD */
dev_priv->num_gb_pipes = 1;
}
}
@@ -736,7 +738,7 @@ static int radeon_do_engine_reset(struct drm_device * dev)
/* setup the raster pipes */
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300)
- radeon_init_pipes(dev_priv);
+ radeon_init_pipes(dev);
/* Reset the CP ring */
radeon_do_cp_reset(dev_priv);
--
1.7.0.3
