ChangeLog | 189 ++++++++
debian/README.source | 7
debian/changelog | 12
debian/control | 5
debian/libpciaccess0.install | 2
debian/patches/pciaccess-hurd-hack.diff | 742 ++++++++++++++++++++++++++++++++
debian/patches/series | 1
debian/rules | 7
8 files changed, 957 insertions(+), 8 deletions(-)
New commits:
commit 03a6760d248d3ce1f6cd895a3a2ba130fc97ffc1
Author: Julien Cristau <jcris...@debian.org>
Date: Sat Aug 8 18:45:25 2009 +0200
Prepare changelog for upload
diff --git a/debian/changelog b/debian/changelog
index d9ab4e0..d4d22dd 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,4 +1,4 @@
-libpciaccess (0.10.6-2) UNRELEASED; urgency=low
+libpciaccess (0.10.6-2) unstable; urgency=low
* Apply patch from Samuel Thibault to tinker with I/O ports on systems
without a PCI interface, such as GNU/Hurd (closes: #524111).
@@ -8,7 +8,7 @@ libpciaccess (0.10.6-2) UNRELEASED; urgency=low
* Bump Standards-Version to 3.8.2.
* Version debhelper build-dep to silence lintian.
- -- Julien Cristau <jcris...@debian.org> Sat, 08 Aug 2009 18:23:59 +0200
+ -- Julien Cristau <jcris...@debian.org> Sat, 08 Aug 2009 18:49:40 +0200
libpciaccess (0.10.6-1) unstable; urgency=low
commit 5e939dfea8c0aa48127f7451db6521205d16f902
Author: Julien Cristau <jcris...@debian.org>
Date: Sat Aug 8 18:48:38 2009 +0200
Update upstream changelog
diff --git a/ChangeLog b/ChangeLog
index 82f7a8a..582f4be 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,186 @@
+commit f14c6cd626273bd2f8b102ff661d11926619a99b
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Fri Apr 24 16:32:12 2009 -0700
+
+ Version bump: 0.10.6
+
+ Signed-off-by: Alan Coopersmith <alan.coopersm...@sun.com>
+
+commit 6df3387173c3ab25e8a618d9ccf628682d8336d5
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Fri Apr 24 16:19:34 2009 -0700
+
+ Resync COPYING file with code copyright notices
+
+ Signed-off-by: Alan Coopersmith <alan.coopersm...@sun.com>
+
+commit 7f08a1e19b49c9ffdc62e1dff340b392ac7c42d1
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Fri Apr 17 22:05:03 2009 -0700
+
+ Fix unused variable warnings in Solaris code
+
+ solx_devfs.c: In function `find_target_node':
+ solx_devfs.c:672: warning: unused variable `prop'
+ solx_devfs.c:673: warning: unused variable `i'
+
+ Signed-off-by: Alan Coopersmith <alan.coopersm...@sun.com>
+
+commit 0edb2392ede59cadd75915873b52baa188bfa273
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Fri Apr 17 21:59:25 2009 -0700
+
+ Fix $CWARNFLAGS addition
+
+ Original addition to configure.ac had typo (missing N) - moving to
+ Makefile.am allows easier override at build time
+
+ Signed-off-by: Alan Coopersmith <alan.coopersm...@sun.com>
+
+commit 146dc2f4ac232bb9d63225c8e72b214dc3120ea6
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Fri Apr 17 21:56:31 2009 -0700
+
+ Move included m4 to a subdir so we can more easily update from upstream
+
+ Signed-off-by: Alan Coopersmith <alan.coopersm...@sun.com>
+
+commit a7f8e58d44716a01f4a8dc9826996a0fa78e4196
+Author: Owain Ainsworth <zer...@googlemail.com>
+Date: Sat Apr 18 06:38:46 2009 +0200
+
+ openbsd_pci.c: use the correct size when mapping the legacy vga rom.
+
+ fixes errors (and probably bugs) on intel hardware (at the least).
+
+ Signed-off-by: Matthieu Herrb <matthieu.he...@laas.fr>
+
+commit be748a7b512bf5597e162694a3b1769132938fe1
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Wed Apr 15 10:06:49 2009 -0700
+
+ Sun bug 6811468: pci_device_solx_devfs_probe accesses freed memory
+
+ di_fini() is being called in pci_device_solx_devfs_probe()
+ The di_fini (3DEVINFO) man page says "All handles associated with this
+ snapshot become invalid after the call to di_fini()". But after that,
+ eight lines down, the subroutine was calling di_prop_lookup_ints with
+ a handle args.node which was stored from walking the device tree, and
+ then using the pointers that returned even further down.
+
+ Signed-off-by: Alan Coopersmith <alan.coopersm...@sun.com>
+
+commit c56da48ee806f73c8ed81afb4a251b24de304620
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Tue Apr 14 17:29:10 2009 -0700
+
+ Fix const mismatch compiler warnings in Solaris backend
+
+ Signed-off-by: Alan Coopersmith <alan.coopersm...@sun.com>
+
+commit f6084593c275c5dc1d6154f292991b20bffd68c2
+Author: edward shu <edward....@sun.com>
+Date: Tue Apr 14 17:19:09 2009 -0700
+
+ Sun bug 6785726: libpciaccess needs to use the correct BAR index on solaris
+
+ <http://bugs.opensolaris.org/bugdatabase/view_bug.do?bug_id=6785726>
+
+ Signed-off-by: Alan Coopersmith <alan.coopersm...@sun.com>
+
+commit 2355e720ef3c285a44c88f914ebdc163a1c591a7
+Author: Mark Kettenis <mark.kette...@xs4all.nl>
+Date: Tue Apr 14 21:53:26 2009 +0200
+
+ Make libpciaccess on OpenBSD domain-aware.
+
+ Makes X capable of discovering PCI devices
+ in other domains (on macppc or sparc64 for example).
+
+commit 9ba94caf57e3a8c3e9c6f3f5f068f4a7a7b3ff9d
+Author: Darren Smith <darren.sm...@juno.com>
+Date: Tue Apr 14 10:46:26 2009 -0400
+
+ Be more paranoid about reading bridge info (#20786)
+
+commit 72e75b00e4f3f7df3badb10c916126253204ae45
+Author: Robert Noland <rnol...@2hip.net>
+Date: Fri Feb 27 00:34:28 2009 -0600
+
+ FreeBSD: Incorporate several fixes that have accumulated.
+
+ -Don't frob the BARs while they are enabled
+ -Find proper pci bios address / length
+ -Use the new PCIOCGETBAR ioctl if it exists
+ rather than frob the BARs ourself
+ -Write must also be a power of two
+
+commit 5855cf5a2cc7ee920b42052372ab734003799d00
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Mon Feb 2 20:34:38 2009 -0800
+
+ Add README with pointers to mailing list, bugzilla & git repos
+
+ Signed-off-by: Alan Coopersmith <alan.coopersm...@sun.com>
+
+commit 42b493490e90e1c5461d36beb3f2dc2580c7d25e
+Author: Paulo Cesar Pereira de Andrade <p...@mandriva.com.br>
+Date: Wed Jan 28 18:03:21 2009 -0200
+
+ Janitor: Correct make distcheck and compiler warnings.
+
+commit 5bf4b32c2b3844c50e720be5820f2ce657ddea12
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Thu Jan 22 16:14:22 2009 -0800
+
+ Solaris: Use bus-range properties to limit busses scanned on each node
+
+ Based on code provided by dan.m...@sun.com
+
+commit 0488a2830a6a0d27d9be032607eda954a8c99801
+Author: Matthieu Herrb <matthieu.he...@laas.fr>
+Date: Sun Dec 7 19:18:29 2008 +0100
+
+ Fix a logic error in pci_device_netbsd_write()
+
+ This is the same error as in pci_device_openbsd_write() that actually
+ prevented it to write anything.
+
+commit 565c8fcbf39a56319cee4f77f689dfc79e0c6614
+Author: Matthieu Herrb <matthieu.he...@laas.fr>
+Date: Sun Dec 7 19:00:22 2008 +0100
+
+ Sync with OpenBSD code.
+
+ - implement pci_read_rom()
+ - only set MTRR on x86 cpus
+ - failure to set non-cacheable attributes is not fatal
+ - fix a logic error in pci_write()
+
+commit 8222fb8534cf09e433f0f3d68c35d6c390fbba5e
+Author: Matthieu Herrb <matthieu.he...@laas.fr>
+Date: Tue Nov 25 12:42:15 2008 +0100
+
+ Fix a logic error in pci_device_openbsd_write().
+
+commit 613c1e6d09930bab47f2c6983f220df002c2e2ce
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Wed Nov 19 09:37:49 2008 -0800
+
+ Add AC_SYS_LARGEFILE to configure.ac
+
+commit 0821f3b4eae5428cf1af5c4c056240f8991758f6
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Wed Nov 19 08:22:22 2008 -0800
+
+ Don't open/gzopen pci.ids if we're not going to read it
+
+commit ccbfd4cf2a7d203344bd1ffcb9d0024536a0eefa
+Author: Alan Coopersmith <alan.coopersm...@sun.com>
+Date: Tue Nov 18 19:54:42 2008 -0800
+
+ Fill in byte swapping routines for big-endian Solaris machines
+
commit 7aca9465a61934d57781352f4fcc42b779392cd0
Author: Julien Cristau <jcris...@debian.org>
Date: Fri Oct 31 18:07:52 2008 +0100
@@ -385,7 +568,7 @@ Date: Tue Sep 4 16:13:24 2007 -0700
to pci_device_map_range as soon as possible.
commit 9d1596cba90c8fd273e9d1d5488747cc0f34fdc7
-Merge: b1e9117... 5cf29b0...
+Merge: b1e9117 5cf29b0
Author: James Cloos <cl...@jhcloos.com>
Date: Mon Sep 3 06:15:58 2007 -0400
@@ -569,7 +752,7 @@ Date: Tue Jan 16 21:24:12 2007 -0800
pci_device_cfg_write instead of just passing data.
commit 54d40b528ab769c4e89aaca87d1728a6194e4378
-Merge: 37ce43c... 335d42f...
+Merge: 37ce43c 335d42f
Author: Ian Romanick <i...@us.ibm.com>
Date: Mon Jan 15 11:18:29 2007 -0800
@@ -664,7 +847,7 @@ Date: Tue Nov 14 14:37:53 2006 -0800
Add missing newline at the end of the file.
commit e29843d3b0ff5d32d8ab4bc84c58300782d189d3
-Merge: 07b09d9... d05da65...
+Merge: 07b09d9 d05da65
Author: Eric Anholt <e...@anholt.net>
Date: Tue Nov 14 14:37:46 2006 -0800
commit 922989787edcfecac4fb5a21d9c861c337a555b9
Author: Julien Cristau <jcris...@debian.org>
Date: Sat Aug 8 18:47:41 2009 +0200
Version debhelper build-dep to silence lintian.
diff --git a/debian/changelog b/debian/changelog
index c7d1f09..d9ab4e0 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -6,6 +6,7 @@ libpciaccess (0.10.6-2) UNRELEASED; urgency=low
* Make glob in debian/libpciaccess0.install more strict.
* Add README.source pointing at the quilt package.
* Bump Standards-Version to 3.8.2.
+ * Version debhelper build-dep to silence lintian.
-- Julien Cristau <jcris...@debian.org> Sat, 08 Aug 2009 18:23:59 +0200
diff --git a/debian/control b/debian/control
index 4aeb319..b041d2f 100644
--- a/debian/control
+++ b/debian/control
@@ -4,7 +4,7 @@ Priority: optional
Maintainer: Debian X Strike Force <debian-x@lists.debian.org>
Uploaders: Julien Cristau <jcris...@debian.org>, David Nusinow
<dnusi...@debian.org>
Build-Depends:
- debhelper,
+ debhelper (>= 5),
quilt,
libtool,
automake,
commit 704c78b884c0510468f588fb1bd57f9ae9647037
Author: Julien Cristau <jcris...@debian.org>
Date: Sat Aug 8 18:44:19 2009 +0200
Bump Standards-Version to 3.8.2.
diff --git a/debian/changelog b/debian/changelog
index 90fc714..c7d1f09 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -5,6 +5,7 @@ libpciaccess (0.10.6-2) UNRELEASED; urgency=low
* debian/rules: clean out libtool m4 files.
* Make glob in debian/libpciaccess0.install more strict.
* Add README.source pointing at the quilt package.
+ * Bump Standards-Version to 3.8.2.
-- Julien Cristau <jcris...@debian.org> Sat, 08 Aug 2009 18:23:59 +0200
diff --git a/debian/control b/debian/control
index 7d664c0..4aeb319 100644
--- a/debian/control
+++ b/debian/control
@@ -10,7 +10,7 @@ Build-Depends:
automake,
zlib1g-dev,
xutils-dev ( >= 1:7.4+4 )
-Standards-Version: 3.8.1.0
+Standards-Version: 3.8.2
Vcs-Git: git://git.debian.org/git/pkg-xorg/lib/libpciaccess
Vcs-Browser: http://git.debian.org/?p=pkg-xorg/lib/libpciaccess.git
commit 617e94d34a677f2867eef098bf27cc77b90de524
Author: Julien Cristau <jcris...@debian.org>
Date: Sat Aug 8 18:42:49 2009 +0200
Add README.source pointing at the quilt package.
diff --git a/debian/README.source b/debian/README.source
new file mode 100644
index 0000000..446d386
--- /dev/null
+++ b/debian/README.source
@@ -0,0 +1,7 @@
+This package uses quilt to manage modifications to the upstream source.
+Changes are stored in the source package as diffs in debian/patches and
+applied during the build.
+
+See /usr/share/doc/quilt/README.source in the quilt package for details.
+
+ -- Julien Cristau <jcris...@debian.org> Sat, 08 Aug 2009 18:42:21 +0200
diff --git a/debian/changelog b/debian/changelog
index 5c567ca..90fc714 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -4,6 +4,7 @@ libpciaccess (0.10.6-2) UNRELEASED; urgency=low
without a PCI interface, such as GNU/Hurd (closes: #524111).
* debian/rules: clean out libtool m4 files.
* Make glob in debian/libpciaccess0.install more strict.
+ * Add README.source pointing at the quilt package.
-- Julien Cristau <jcris...@debian.org> Sat, 08 Aug 2009 18:23:59 +0200
commit 8aaac557f90fc09207407fd5c34c8cf0c967054d
Author: Julien Cristau <jcris...@debian.org>
Date: Sat Aug 8 18:38:48 2009 +0200
Make glob in debian/libpciaccess0.install more strict.
diff --git a/debian/changelog b/debian/changelog
index f07c33e..5c567ca 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -3,6 +3,7 @@ libpciaccess (0.10.6-2) UNRELEASED; urgency=low
* Apply patch from Samuel Thibault to tinker with I/O ports on systems
without a PCI interface, such as GNU/Hurd (closes: #524111).
* debian/rules: clean out libtool m4 files.
+ * Make glob in debian/libpciaccess0.install more strict.
-- Julien Cristau <jcris...@debian.org> Sat, 08 Aug 2009 18:23:59 +0200
diff --git a/debian/libpciaccess0.install b/debian/libpciaccess0.install
index a190379..413fe77 100644
--- a/debian/libpciaccess0.install
+++ b/debian/libpciaccess0.install
@@ -1 +1 @@
-usr/lib/libpciaccess.so.*
+usr/lib/libpciaccess.so.0*
commit 46be4978c7049cf3f0d59580b04990b18e3de750
Author: Julien Cristau <jcris...@debian.org>
Date: Sat Aug 8 18:38:04 2009 +0200
debian/rules: clean out libtool m4 files.
diff --git a/debian/changelog b/debian/changelog
index 03a48db..f07c33e 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -2,6 +2,7 @@ libpciaccess (0.10.6-2) UNRELEASED; urgency=low
* Apply patch from Samuel Thibault to tinker with I/O ports on systems
without a PCI interface, such as GNU/Hurd (closes: #524111).
+ * debian/rules: clean out libtool m4 files.
-- Julien Cristau <jcris...@debian.org> Sat, 08 Aug 2009 18:23:59 +0200
diff --git a/debian/rules b/debian/rules
index 9ab3b00..3ec1062 100755
--- a/debian/rules
+++ b/debian/rules
@@ -59,6 +59,7 @@ clean: unpatch
rm -f $$(find -name Makefile.in)
rm -f compile config.guess config.sub configure depcomp install-sh
rm -f ltmain.sh missing INSTALL aclocal.m4 mkinstalldirs config.h.in
+ rm -f m4/libtool.m4 m4/lt*.m4
dh_clean
commit 9473c808935831a31df4ad8b310eb99eea65246b
Author: Julien Cristau <jcris...@debian.org>
Date: Sat Aug 8 18:27:39 2009 +0200
Add hurd hack
Apply patch from Samuel Thibault to tinker with I/O ports on systems
without a PCI interface, such as GNU/Hurd (closes: #524111).
diff --git a/debian/changelog b/debian/changelog
index 489eab5..03a48db 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,10 @@
+libpciaccess (0.10.6-2) UNRELEASED; urgency=low
+
+ * Apply patch from Samuel Thibault to tinker with I/O ports on systems
+ without a PCI interface, such as GNU/Hurd (closes: #524111).
+
+ -- Julien Cristau <jcris...@debian.org> Sat, 08 Aug 2009 18:23:59 +0200
+
libpciaccess (0.10.6-1) unstable; urgency=low
* New upstream release
diff --git a/debian/control b/debian/control
index c3ac7e7..7d664c0 100644
--- a/debian/control
+++ b/debian/control
@@ -5,6 +5,7 @@ Maintainer: Debian X Strike Force <debian-x@lists.debian.org>
Uploaders: Julien Cristau <jcris...@debian.org>, David Nusinow
<dnusi...@debian.org>
Build-Depends:
debhelper,
+ quilt,
libtool,
automake,
zlib1g-dev,
diff --git a/debian/patches/pciaccess-hurd-hack.diff
b/debian/patches/pciaccess-hurd-hack.diff
new file mode 100644
index 0000000..80e0fa8
--- /dev/null
+++ b/debian/patches/pciaccess-hurd-hack.diff
@@ -0,0 +1,742 @@
+From: Samuel Thibault <samuel.thiba...@ens-lyon.org>
+Date: Wed, 15 Apr 2009 00:47:31 +0200
+Subject: Bug#524111: libpciaccess: Add support for OS without a PCI interface
+
+The attached patch adds support for OSes that do not have a PCI
+interface, tinkering with I/O ports, and makes use of it on GNU/Hurd.
+
+Index: libpciaccess/src/Makefile.am
+===================================================================
+--- libpciaccess.orig/src/Makefile.am
++++ libpciaccess/src/Makefile.am
+@@ -45,6 +45,10 @@
+ OS_SUPPORT = solx_devfs.c pci_tools.h
+ endif
+
++if GNU
++OS_SUPPORT = x86_pci.c
++endif
++
+ libpciaccess_la_SOURCES = common_bridge.c \
+ common_iterator.c \
+ common_init.c \
+Index: libpciaccess/configure.ac
+===================================================================
+--- libpciaccess.orig/configure.ac
++++ libpciaccess/configure.ac
+@@ -81,6 +81,9 @@
+ solaris=yes
+ PCIACCESS_LIBS="$PCIACCESS_LIBS -ldevinfo"
+ ;;
++ gnu*)
++ gnu=yes
++ ;;
+ esac
+
+ AM_CONDITIONAL(LINUX, [test "x$linux" = xyes])
+@@ -88,6 +91,7 @@
+ AM_CONDITIONAL(NETBSD, [test "x$netbsd" = xyes])
+ AM_CONDITIONAL(OPENBSD, [test "x$openbsd" = xyes])
+ AM_CONDITIONAL(SOLARIS, [test "x$solaris" = xyes])
++AM_CONDITIONAL(GNU, [test "x$gnu" = xyes])
+
+ AC_SYS_LARGEFILE
+
+Index: libpciaccess/src/common_init.c
+===================================================================
+--- libpciaccess.orig/src/common_init.c
++++ libpciaccess/src/common_init.c
+@@ -62,6 +62,8 @@
+ err = pci_system_openbsd_create();
+ #elif defined(__sun)
+ err = pci_system_solx_devfs_create();
++#elif defined(__GNU__)
++ err = pci_system_x86_create();
+ #endif
+
+ return err;
+Index: libpciaccess/src/pciaccess_private.h
+===================================================================
+--- libpciaccess.orig/src/pciaccess_private.h
++++ libpciaccess/src/pciaccess_private.h
+@@ -140,3 +140,4 @@
+ extern int pci_system_openbsd_create( void );
+ extern void pci_system_openbsd_init_dev_mem( int );
+ extern int pci_system_solx_devfs_create( void );
++extern int pci_system_x86_create( void );
+Index: libpciaccess/src/x86_pci.c
+===================================================================
+--- /dev/null
++++ libpciaccess/src/x86_pci.c
+@@ -0,0 +1,671 @@
++/*
++ * Copyright (c) 2009 Samuel Thibault
++ * Heavily inspired from the freebsd, netbsd, and openbsd backends
++ * (C) Copyright Eric Anholt 2006
++ * (C) Copyright IBM Corporation 2006
++ * Copyright (c) 2008 Juan Romero Pardines
++ * Copyright (c) 2008 Mark Kettenis
++ *
++ * Permission to use, copy, modify, and distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#define _GNU_SOURCE
++#include <unistd.h>
++#include <stdio.h>
++#include <stdlib.h>
++#include <errno.h>
++#include <fcntl.h>
++#include <sys/mman.h>
++#include <string.h>
++
++#include "pciaccess.h"
++#include "pciaccess_private.h"
++
++#if defined(__GNU__)
++
++#include <sys/io.h>
++
++static int
++x86_enable_io(void)
++{
++ if (!ioperm(0, 0xffff, 1))
++ return 0;
++ return errno;
++}
++
++static int
++x86_disable_io(void)
++{
++ if (!ioperm(0, 0xffff, 0))
++ return 0;
++ return errno;
++}
++
++#elif defined(__GLIBC__)
++
++#include <sys/io.h>
++
++static int
++x86_enable_io(void)
++{
++ if (!iopl(3))
++ return 0;
++ return errno;
++}
++
++static int
++x86_disable_io(void)
++{
++ if (!iopl(0))
++ return 0;
++ return errno;
++}
++
++#else
++
++#error How to enable IO ports on this system?
++
++#endif
++
++#define PCI_VENDOR(reg) ((reg) & 0xFFFF)
++#define PCI_VENDOR_INVALID 0xFFFF
++
++#define PCI_VENDOR_ID 0x00
++#define PCI_SUB_VENDOR_ID 0x2c
++#define PCI_VENDOR_ID_COMPAQ 0x0e11
++#define PCI_VENDOR_ID_INTEL 0x8086
++
++#define PCI_DEVICE(reg) (((reg) >> 16) & 0xFFFF)
++#define PCI_DEVICE_INVALID 0xFFFF
++
++#define PCI_CLASS 0x08
++#define PCI_CLASS_DEVICE 0x0a
++#define PCI_CLASS_DISPLAY_VGA 0x0300
++#define PCI_CLASS_BRIDGE_HOST 0x0600
++
++#define PCIC_DISPLAY 0x03
++#define PCIS_DISPLAY_VGA 0x00
++
++#define PCI_HDRTYPE 0x0E
++#define PCI_IRQ 0x3C
++
++struct pci_system_x86 {
++ struct pci_system system;
++ int (*read)(unsigned bus, unsigned dev, unsigned func, pciaddr_t reg,
void *data, unsigned size);
++ int (*write)(unsigned bus, unsigned dev, unsigned func, pciaddr_t reg,
const void *data, unsigned size);
++};
++
++static int
++pci_x86_conf1_probe(void)
++{
++ unsigned long sav;
++ int res = ENODEV;
++
++ outb(0x01, 0xCFB);
++ sav = inl(0xCF8);
++ outl(0x80000000, 0xCF8);
++ if (inl(0xCF8) == 0x80000000)
++ res = 0;
++ outl(sav, 0xCF8);
++
++ return res;
++}
++
++static int
++pci_x86_conf1_read(unsigned bus, unsigned dev, unsigned func, pciaddr_t reg,
void *data, unsigned size)
++{
++ unsigned addr = 0xCFC + (reg & 3);
++ unsigned long sav;
++ int ret = 0;
++
++ if (bus >= 0x100 || dev >= 32 || func >= 8 || reg >= 0x100)
++ return EIO;
++
++ sav = inl(0xCF8);
++ outl(0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3),
0xCF8);
++ /* NOTE: x86 is already LE */
++ switch (size) {
++ case 1: {
++ uint8_t *val = data;
++ *val = inb(addr);
++ break;
++ }
++ case 2: {
++ uint16_t *val = data;
++ *val = inw(addr);
++ break;
++ }
++ case 4: {
++ uint32_t *val = data;
++ *val = inl(addr);
++ break;
++ }
++ default:
++ ret = EIO;
++ break;
++ }
++ outl(sav, 0xCF8);
++
++ return ret;
++}
++
++static int
++pci_x86_conf1_write(unsigned bus, unsigned dev, unsigned func, pciaddr_t reg,
const void *data, unsigned size)
++{
++ unsigned addr = 0xCFC + (reg & 3);
++ unsigned long sav;
++ int ret = 0;
++
++ if (bus >= 0x100 || dev >= 32 || func >= 8 || reg >= 0x100)
++ return EIO;
++
++ sav = inl(0xCF8);
++ outl(0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3),
0xCF8);
++ /* NOTE: x86 is already LE */
++ switch (size) {
++ case 1: {
++ const uint8_t *val = data;
++ outb(*val, addr);
++ break;
++ }
++ case 2: {
++ const uint16_t *val = data;
++ outw(*val, addr);
++ break;
++ }
++ case 4: {
++ const uint32_t *val = data;
++ outl(*val, addr);
++ break;
++ }
++ default:
++ ret = EIO;
++ break;
++ }
++ outl(sav, 0xCF8);
++
++ return ret;
++}
++
++static int
++pci_x86_conf2_probe(void)
++{
++ outb(0, 0xCFB);
++ outb(0, 0xCF8);
++ outb(0, 0xCFA);
++ if (inb(0xCF8) == 0 && inb(0xCFA) == 0)
++ return 0;
++
++ return ENODEV;
++}
++
++static int
++pci_x86_conf2_read(unsigned bus, unsigned dev, unsigned func, pciaddr_t reg,
void *data, unsigned size)
++{
++ unsigned addr = 0xC000 | dev << 8 | reg;
++ int ret = 0;
++
++ if (bus >= 0x100 || dev >= 16 || func >= 8 || reg >= 0x100)
++ return EIO;
++
++ outb((func << 1) | 0xF0, 0xCF8);
++ outb(bus, 0xCFA);
++ /* NOTE: x86 is already LE */
++ switch (size) {
++ case 1: {
++ uint8_t *val = data;
++ *val = inb(addr);
++ break;
++ }
++ case 2: {
++ uint16_t *val = data;
++ *val = inw(addr);
++ break;
++ }
++ case 4: {
++ uint32_t *val = data;
++ *val = inl(addr);
++ break;
++ }
++ default:
++ ret = EIO;
++ break;
++ }
++ outb(0, 0xCF8);
++
++ return ret;
++}
++
++static int
++pci_x86_conf2_write(unsigned bus, unsigned dev, unsigned func, pciaddr_t reg,
const void *data, unsigned size)
++{
++ unsigned addr = 0xC000 | dev << 8 | reg;
++ int ret = 0;
++
++ if (bus >= 0x100 || dev >= 16 || func >= 8 || reg >= 0x100)
++ return EIO;
++
++ outb((func << 1) | 0xF0, 0xCF8);
++ outb(bus, 0xCFA);
++ /* NOTE: x86 is already LE */
++ switch (size) {
++ case 1: {
++ const uint8_t *val = data;
++ outb(*val, addr);
++ break;
++ }
++ case 2: {
++ const uint16_t *val = data;
++ outw(*val, addr);
++ break;
++ }
++ case 4: {
++ const uint32_t *val = data;
++ outl(*val, addr);
++ break;
++ }
++ default:
++ ret = EIO;
++ break;
++ }
++ outb(0, 0xCF8);
++
++ return ret;
++}
++
++/* Check that this really looks like a PCI configuration. */
++static int
++pci_x86_check(struct pci_system_x86 *pci_sys_x86)
++{
++ int dev;
++ uint16_t class, vendor;
++
++ /* Look on bus 0 for a device that is a host bridge, a VGA card,
++ * or an intel or compaq device. */
++
++ for (dev = 0; dev < 32; dev++) {
++ if (pci_sys_x86->read(0, dev, 0, PCI_CLASS_DEVICE, &class,
sizeof(class)))
++ continue;
++ if (class == PCI_CLASS_BRIDGE_HOST || class == PCI_CLASS_DISPLAY_VGA)
++ return 0;
++ if (pci_sys_x86->read(0, dev, 0, PCI_VENDOR_ID, &vendor,
sizeof(vendor)))
++ continue;
++ if (vendor == PCI_VENDOR_ID_INTEL || class == PCI_VENDOR_ID_COMPAQ)
++ return 0;
++ }
++
++ return ENODEV;
++}
++
++static int
++pci_nfuncs(struct pci_system_x86 *pci_sys_x86, int bus, int dev)
++{
++ uint8_t hdr;
++ int err;
++
++ err = pci_sys_x86->read(bus, dev, 0, PCI_HDRTYPE, &hdr, sizeof(hdr));
++
++ if (err)
++ return err;
++
++ return hdr & 0x80 ? 8 : 1;
++}
++
++/**
++ * Read a VGA rom using the 0xc0000 mapping.
++ */
++static int
++pci_device_x86_read_rom(struct pci_device *dev, void *buffer)
++{
++ void *bios;
++ int memfd;
++
++ if ((dev->device_class & 0x00ffff00) !=
++ ((PCIC_DISPLAY << 16) | ( PCIS_DISPLAY_VGA << 8))) {
++ return ENOSYS;
++ }
++
++ memfd = open("/dev/mem", O_RDONLY);
++ if (memfd == -1)
++ return errno;
++
++ bios = mmap(NULL, dev->rom_size, PROT_READ, 0, memfd, 0xc0000);
++ if (bios == MAP_FAILED) {
++ close(memfd);
++ return errno;
++ }
++
++ memcpy(buffer, bios, dev->rom_size);
++
++ munmap(bios, dev->rom_size);
++ close(memfd);
++
++ return 0;
++}
++
++/** Returns the number of regions (base address registers) the device has */
++static int
++pci_device_x86_get_num_regions(uint8_t header_type)
++{
++ switch (header_type & 0x7f) {
++ case 0:
++ return 6;
++ case 1:
++ return 2;
++ case 2:
++ return 1;
++ default:
++ printf("unknown header type %02x\n", header_type);
++ return 0;
++ }
++}
++
++/** Masks out the flag bigs of the base address register value */
++static uint32_t
++get_map_base( uint32_t val )
++{
++ if (val & 0x01)
++ return val & ~0x03;
++ else
++ return val & ~0x0f;
++}
++
++/** Returns the size of a region based on the all-ones test value */
++static int
++get_test_val_size( uint32_t testval )
++{
++ int size = 1;
++
++ if (testval == 0)
++ return 0;
++
++ /* Mask out the flag bits */
++ testval = get_map_base( testval );
++ if (!testval)
++ return 0;
++
++ while ((testval & 1) == 0) {
++ size <<= 1;
++ testval >>= 1;
++ }
++
++ return size;
++}
++
++static int
++pci_device_x86_probe(struct pci_device *dev)
++{
++ uint8_t irq, hdrtype;
++ int err, i, bar;
++
++ /* Many of the fields were filled in during initial device enumeration.
++ * At this point, we need to fill in regions, rom_size, and irq.
++ */
++
++ err = pci_device_cfg_read_u8(dev, &irq, PCI_IRQ);
++ if (err)
++ return err;
++ dev->irq = irq;
++
++ err = pci_device_cfg_read_u8(dev, &hdrtype, PCI_HDRTYPE);
++ if (err)
++ return err;
++
++ bar = 0x10;
++ for (i = 0; i < pci_device_x86_get_num_regions(hdrtype); i++, bar += 4) {
++ uint32_t addr, testval;
++
++ /* Get the base address */
++ err = pci_device_cfg_read_u32(dev, &addr, bar);
++ if (err != 0)
++ continue;
++
++ /* Test write all ones to the register, then restore it. */
++ err = pci_device_cfg_write_u32(dev, 0xffffffff, bar);
++ if (err != 0)
++ continue;
++ pci_device_cfg_read_u32(dev, &testval, bar);
++ err = pci_device_cfg_write_u32(dev, addr, bar);
++
++ if (addr & 0x01)
++ dev->regions[i].is_IO = 1;
++ if (addr & 0x04)
++ dev->regions[i].is_64 = 1;
++ if (addr & 0x08)
++ dev->regions[i].is_prefetchable = 1;
++
++ /* Set the size */
++ dev->regions[i].size = get_test_val_size(testval);
++
++ /* Set the base address value */
++ if (dev->regions[i].is_64) {
++ uint32_t top;
++
++ err = pci_device_cfg_read_u32(dev, &top, bar + 4);
++ if (err != 0)
++ continue;
++
++ dev->regions[i].base_addr = ((uint64_t)top << 32) |
++ get_map_base(addr);
++ bar += 4;
++ i++;
++ } else {
++ dev->regions[i].base_addr = get_map_base(addr);
++ }
++ }
++
++ /* If it's a VGA device, set up the rom size for read_rom using the
++ * 0xc0000 mapping.
++ */
++ if ((dev->device_class & 0x00ffff00) ==
++ ((PCIC_DISPLAY << 16) | (PCIS_DISPLAY_VGA << 8)))
++ {
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