debian/changelog | 47 +++++++++++++
debian/patches/01_gen_pci_ids.diff | 4 -
src/common.h | 7 +
src/i810_driver.c | 4 +
src/i810_reg.h | 6 +
src/i830.h | 9 ++
src/i830_accel.c | 9 ++
src/i830_crt.c | 11 +++
src/i830_dri.c | 130 ++++++++++++++++++-------------------
src/i830_driver.c | 50 +++++++++++---
src/i830_quirks.c | 7 +
src/i830_xaa.c | 10 +-
12 files changed, 208 insertions(+), 86 deletions(-)
New commits:
commit c05f17270cf22fdfa50d4b53f19c60df687d72f0
Author: Julien Cristau <[EMAIL PROTECTED]>
Date: Mon Oct 20 20:30:45 2008 +0200
Prepare changelog for upload
diff --git a/debian/changelog b/debian/changelog
index 92dfaa3..0bc4e6c 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,4 +1,4 @@
-xserver-xorg-video-intel (2:2.3.2-2+lenny5) UNRELEASED; urgency=low
+xserver-xorg-video-intel (2:2.3.2-2+lenny5) unstable; urgency=low
* Cherry-pick some more patches from upstream git:
- Disable display clock gating for 4 series chips
@@ -43,7 +43,7 @@ xserver-xorg-video-intel (2:2.3.2-2+lenny5) UNRELEASED;
urgency=low
* Adjust patch 01_gen_pci_ids.diff to exclude G41 as well, so vesa is chosen
by default. The intel driver can still be selected in xorg.conf.
- -- Julien Cristau <[EMAIL PROTECTED]> Sat, 18 Oct 2008 15:41:04 +0200
+ -- Julien Cristau <[EMAIL PROTECTED]> Mon, 20 Oct 2008 20:28:39 +0200
xserver-xorg-video-intel (2:2.3.2-2+lenny4) unstable; urgency=low
commit dd96340f33f1194589b0759363239911b81a9b28
Author: Keith Packard <[EMAIL PROTECTED]>
Date: Sun Oct 19 13:39:04 2008 -0700
Remove accidental 'return;' left at the top of I830DRIInitBuffers
I was testing the behaviour of the XAA-based DRI buffer drawing code for
tiled buffers and accidentally left I830DRIInitBuffers disabled.
Signed-off-by: Keith Packard <[EMAIL PROTECTED]>
(cherry picked from commit c25437a69490b09acff335a81a38aa540f0822f5)
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 5c9344e..f7fe2d2 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1162,7 +1162,6 @@ I830DRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32
index)
int nbox;
int buffer, first_buffer, last_buffer;
- return;
if (I810_DEBUG & DEBUG_VERBOSE_DRI)
ErrorF("I830DRIInitBuffers\n");
commit 1d1b63b1f60f9dc72fa8d17e5601b588a120cf0e
Author: Julien Cristau <[EMAIL PROTECTED]>
Date: Sat Oct 18 15:53:34 2008 +0200
Update changelog for cherry-picked patches
Also disable G41 in 01_gen_pci_ids.diff.
diff --git a/debian/changelog b/debian/changelog
index 556eeed..92dfaa3 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,50 @@
+xserver-xorg-video-intel (2:2.3.2-2+lenny5) UNRELEASED; urgency=low
+
+ * Cherry-pick some more patches from upstream git:
+ - Disable display clock gating for 4 series chips
+ - Pipe A force quirk for Toshiba Satellite A30.
+ - i830: Fix timer leak
+ TimerCancel just cancels the timer: it still leaves the TimerRec intact
+ and unfreed.
+ - Disable render standby
+ Render standby is known to cause possible hang issue on some mobile
+ chips, so always disable it.
+ - Add support for G41 chipset
+ G41 is another 4 series chipset like G45/43.
+ - Add Cappuccino SlimPRO SP625F to no LVDS quirks list
+ Looks like this platform might contain VBTs that indicate an LFP is
+ present even though it isn't. Intended to fix bz #11368.
+ - Add TV out quirk for HP Compaq nx6110
+ Adds a TV out quirk for HP Compaq nx6110. Fixes bz #17683.
+ - Do force CRT detect sequence twice on 4 series chipset
+ - Render register clock gating disable fix on 4 series chipset
+ - Disable frame buffer compression by default for GM965.
+ We haven't found a way to make FBC work reliably with GM965 yet, (it
+ often fails to notice CPU writes). This appears to be a specific problem
+ with this device, (as we haven't gotten similar bug reports for
+ subsequent devices such as GM45). So FBC is now disabled by default for
+ GM965 but can still be enabled with the FrameBufferCompression option
+ for experimenting/debugging
+ - Fix broken stolen memory counting on G4X (closes: #502387).
+ On the GM45 we were assuming too little stolen memory (mostly harmless,
+ except when it wasn't, until the AGP fix), and on the G45 we were
+ assuming too much stolen memory, which was quite harmful when we touched
+ the page that didn't get mapped.
+ - XAA tiling support was mis-computing adjusted pitch (>>4 instead of >>2)
+ This may well explain why XAA never worked well on tiled front buffers;
+ tiled buffers require a different pitch programming on 965 than
+ non-tiled buffers, in dwords rather than bytes
+ - Handle differently tiled front/back/depth/third in DRI window management
+ When moving or clearing the extra buffer contents associated with DRI
+ windows, the XAA code needs to see which buffer is being manipulated in
+ the Setup functions to program the tiling values correctly. Calling
+ I830SelectBuffer and not then calling I830Setup... would result in
+ mis-tiled rendering
+ * Adjust patch 01_gen_pci_ids.diff to exclude G41 as well, so vesa is chosen
+ by default. The intel driver can still be selected in xorg.conf.
+
+ -- Julien Cristau <[EMAIL PROTECTED]> Sat, 18 Oct 2008 15:41:04 +0200
+
xserver-xorg-video-intel (2:2.3.2-2+lenny4) unstable; urgency=low
* Kill 02_xaa_by_default_on_i965.diff. Switching to XAA breaks Xvideo,
diff --git a/debian/patches/01_gen_pci_ids.diff
b/debian/patches/01_gen_pci_ids.diff
index 7b57457..3d77b2a 100644
--- a/debian/patches/01_gen_pci_ids.diff
+++ b/debian/patches/01_gen_pci_ids.diff
@@ -1,4 +1,4 @@
-Drop G45 pci.ids for now.
+Drop G4x pci.ids for now.
Index: xserver-xorg-video-intel/src/Makefile.am
===================================================================
@@ -13,4 +13,4 @@ Index: xserver-xorg-video-intel/src/Makefile.am
+pcidata_DATA = intel.ids
+
+intel.ids : common.h
-+ awk '/^#define PCI_CHIP/ {print $$3 }' $(srcdir)/common.h | grep -vE
'0x2A42|0x2E02|0x2E22|0x2E12' | sed 's/^0x/8086/' > intel.ids
++ awk '/^#define PCI_CHIP/ {print $$3 }' $(srcdir)/common.h | grep -vE
'0x2A42|0x2E02|0x2E22|0x2E12|0x2E32' | sed 's/^0x/8086/' > intel.ids
commit 69111a7258b552e12022587aa2072c39134053ac
Author: Keith Packard <[EMAIL PROTECTED]>
Date: Fri Oct 17 00:07:09 2008 -0700
Handle differently tiled front/back/depth/third in DRI window management
When moving or clearing the extra buffer contents associated with DRI
windows, the XAA code needs to see which buffer is being manipulated in the
Setup functions to program the tiling values correctly. Calling
I830SelectBuffer and not then calling I830Setup... would result in mis-tiled
rendering.
Signed-off-by: Keith Packard <[EMAIL PROTECTED]>
Signed-off-by: Eric Anholt <[EMAIL PROTECTED]>
(cherry picked from commit 7ddea0447c8972104d43cd7966f5ce89b4cca20c)
diff --git a/src/i830.h b/src/i830.h
index 0102b00..eb46725 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -679,7 +679,7 @@ extern Bool I830CursorInit(ScreenPtr pScreen);
extern void IntelEmitInvarientState(ScrnInfoPtr pScrn);
extern void I830EmitInvarientState(ScrnInfoPtr pScrn);
extern void I915EmitInvarientState(ScrnInfoPtr pScrn);
-extern void I830SelectBuffer(ScrnInfoPtr pScrn, int buffer);
+extern Bool I830SelectBuffer(ScrnInfoPtr pScrn, int buffer);
void i830_update_cursor_offsets(ScrnInfoPtr pScrn);
/* CRTC-based cursor functions */
diff --git a/src/i830_accel.c b/src/i830_accel.c
index 7784c62..7ea9d9a 100644
--- a/src/i830_accel.c
+++ b/src/i830_accel.c
@@ -224,7 +224,7 @@ I830EmitFlush(ScrnInfoPtr pScrn)
}
}
-void
+Bool
I830SelectBuffer(ScrnInfoPtr pScrn, int buffer)
{
I830Ptr pI830 = I830PTR(pScrn);
@@ -233,12 +233,18 @@ I830SelectBuffer(ScrnInfoPtr pScrn, int buffer)
#ifdef XF86DRI
case I830_SELECT_BACK:
pI830->bufferOffset = pI830->back_buffer->offset;
+ if (pI830->back_buffer->tiling == TILE_YMAJOR)
+ return FALSE;
break;
case I830_SELECT_THIRD:
pI830->bufferOffset = pI830->third_buffer->offset;
+ if (pI830->third_buffer->tiling == TILE_YMAJOR)
+ return FALSE;
break;
case I830_SELECT_DEPTH:
pI830->bufferOffset = pI830->depth_buffer->offset;
+ if (pI830->depth_buffer->tiling == TILE_YMAJOR)
+ return FALSE;
break;
#endif
default:
@@ -250,6 +256,7 @@ I830SelectBuffer(ScrnInfoPtr pScrn, int buffer)
if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
ErrorF("I830SelectBuffer %d --> offset %x\n",
buffer, pI830->bufferOffset);
+ return TRUE;
}
/* The following function sets up the supported acceleration. Call it
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 4361ad0..5c9344e 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1158,47 +1158,42 @@ I830DRIInitBuffers(WindowPtr pWin, RegionPtr prgn,
CARD32 index)
{
ScreenPtr pScreen = pWin->drawable.pScreen;
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- BoxPtr pbox = REGION_RECTS(prgn);
- int nbox = REGION_NUM_RECTS(prgn);
+ BoxPtr pbox;
+ int nbox;
+ int buffer, first_buffer, last_buffer;
+ return;
if (I810_DEBUG & DEBUG_VERBOSE_DRI)
ErrorF("I830DRIInitBuffers\n");
- I830SetupForSolidFill(pScrn, 0, GXcopy, -1);
- while (nbox--) {
- I830SelectBuffer(pScrn, I830_SELECT_BACK);
- I830SubsequentSolidFillRect(pScrn, pbox->x1, pbox->y1,
- pbox->x2 - pbox->x1, pbox->y2 - pbox->y1);
+ first_buffer = I830_SELECT_BACK;
+ last_buffer = I830_SELECT_DEPTH;
+ if (I830PTR(pScrn)->third_buffer)
+ last_buffer = I830_SELECT_THIRD;
- if (I830PTR(pScrn)->third_buffer) {
- I830SelectBuffer(pScrn, I830_SELECT_THIRD);
+ for (buffer = first_buffer; buffer <= last_buffer; buffer++) {
+ pbox = REGION_RECTS(prgn);
+ nbox = REGION_NUM_RECTS(prgn);
+
+ if (!I830SelectBuffer(pScrn, buffer))
+ continue;
+
+ if (buffer == I830_SELECT_DEPTH) {
+ switch (pScrn->bitsPerPixel) {
+ case 16:
+ I830SetupForSolidFill(pScrn, 0xffff, GXcopy, -1);
+ break;
+ case 32:
+ I830SetupForSolidFill(pScrn, 0xffffff, GXcopy, -1);
+ break;
+ }
+ } else
+ I830SetupForSolidFill(pScrn, 0, GXcopy, -1);
+ while (nbox--) {
I830SubsequentSolidFillRect(pScrn, pbox->x1, pbox->y1,
pbox->x2 - pbox->x1, pbox->y2 - pbox->y1);
+ pbox++;
}
-
- pbox++;
- }
-
- /* Clear the depth buffer - uses 0xffff rather than 0.
- */
- pbox = REGION_RECTS(prgn);
- nbox = REGION_NUM_RECTS(prgn);
-
- I830SelectBuffer(pScrn, I830_SELECT_DEPTH);
-
- switch (pScrn->bitsPerPixel) {
- case 16:
- I830SetupForSolidFill(pScrn, 0xffff, GXcopy, -1);
- break;
- case 32:
- I830SetupForSolidFill(pScrn, 0xffffff, GXcopy, -1);
- break;
- }
-
- while (nbox--) {
- I830SubsequentSolidFillRect(pScrn, pbox->x1, pbox->y1,
- pbox->x2 - pbox->x1, pbox->y2 - pbox->y1);
- pbox++;
}
I830SelectBuffer(pScrn, I830_SELECT_FRONT);
@@ -1239,6 +1234,7 @@ I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec
ptOldOrg,
int dx = pParent->drawable.x - ptOldOrg.x;
int dy = pParent->drawable.y - ptOldOrg.y;
+ int buffer, first_buffer, last_buffer;
/* If the copy will overlap in Y, reverse the order */
if (dy > 0) {
@@ -1320,44 +1316,47 @@ I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec
ptOldOrg,
/* SelectBuffer isn't really a good concept for the i810.
*/
I830EmitFlush(pScrn);
- I830SetupForScreenToScreenCopy(pScrn, xdir, ydir, GXcopy, -1, -1);
- for (; nbox--; pbox++) {
-
- int x1 = pbox->x1;
- int y1 = pbox->y1;
- int destx = x1 + dx;
- int desty = y1 + dy;
- int w = pbox->x2 - x1 + 1;
- int h = pbox->y2 - y1 + 1;
-
- if (destx < 0)
- x1 -= destx, w += destx, destx = 0;
- if (desty < 0)
- y1 -= desty, h += desty, desty = 0;
- if (destx + w > screenwidth)
- w = screenwidth - destx;
- if (desty + h > screenheight)
- h = screenheight - desty;
- if (w <= 0)
- continue;
- if (h <= 0)
- continue;
+ first_buffer = I830_SELECT_BACK;
+ last_buffer = I830_SELECT_DEPTH;
+ if (pI830->third_buffer)
+ last_buffer = I830_SELECT_THIRD;
- if (I810_DEBUG & DEBUG_VERBOSE_DRI)
- ErrorF("MoveBuffers %d,%d %dx%d dx: %d dy: %d\n",
- x1, y1, w, h, dx, dy);
+ for (buffer = first_buffer; buffer <= last_buffer; buffer++) {
+ if (!I830SelectBuffer(pScrn, buffer))
+ continue;
+ I830SetupForScreenToScreenCopy(pScrn, xdir, ydir, GXcopy, -1, -1);
+ pbox = REGION_RECTS(prgnSrc);
+ nbox = REGION_NUM_RECTS(prgnSrc);
+ for (; nbox--; pbox++) {
+
+ int x1 = pbox->x1;
+ int y1 = pbox->y1;
+ int destx = x1 + dx;
+ int desty = y1 + dy;
+ int w = pbox->x2 - x1 + 1;
+ int h = pbox->y2 - y1 + 1;
+
+ if (destx < 0)
+ x1 -= destx, w += destx, destx = 0;
+ if (desty < 0)
+ y1 -= desty, h += desty, desty = 0;
+ if (destx + w > screenwidth)
+ w = screenwidth - destx;
+ if (desty + h > screenheight)
+ h = screenheight - desty;
+ if (w <= 0)
+ continue;
+ if (h <= 0)
+ continue;
+
+ if (I810_DEBUG & DEBUG_VERBOSE_DRI)
+ ErrorF("MoveBuffers %d,%d %dx%d dx: %d dy: %d\n",
+ x1, y1, w, h, dx, dy);
- I830SelectBuffer(pScrn, I830_SELECT_BACK);
- I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h);
- if (pI830->third_buffer) {
- I830SelectBuffer(pScrn, I830_SELECT_THIRD);
I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h);
}
- if (!IS_I965G(pI830)) {
- I830SelectBuffer(pScrn, I830_SELECT_DEPTH);
- I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h);
- }
}
+
I830SelectBuffer(pScrn, I830_SELECT_FRONT);
I830EmitFlush(pScrn);
commit d5bd1a57c86df7706206d1fe8762bb71db55162b
Author: Keith Packard <[EMAIL PROTECTED]>
Date: Fri Oct 17 00:07:08 2008 -0700
XAA tiling support was mis-computing adjusted pitch (>>4 instead of >>2)
This may well explain why XAA never worked well on tiled front buffers;
tiled buffers require a different pitch programming on 965 than non-tiled
buffers, in dwords rather than bytes.
Signed-off-by: Keith Packard <[EMAIL PROTECTED]>
Signed-off-by: Eric Anholt <[EMAIL PROTECTED]>
(cherry picked from commit c946383afc644ae7740e3c3146424fdd86c05285)
diff --git a/src/i830_xaa.c b/src/i830_xaa.c
index c9c26b0..e5e849d 100644
--- a/src/i830_xaa.c
+++ b/src/i830_xaa.c
@@ -314,7 +314,7 @@ I830SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
color, rop, planemask);
if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 2;
} else {
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
}
@@ -385,7 +385,7 @@ I830SetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir,
int ydir, int rop,
xdir, ydir, rop, planemask, transparency_color);
if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 2;
} else {
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
}
@@ -468,7 +468,7 @@ I830SetupForMono8x8PatternFill(ScrnInfoPtr pScrn, int
pattx, int patty,
pI830->BR[19] = fg;
if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 2;
} else {
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
}
@@ -565,7 +565,7 @@ I830SetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr
pScrn,
/* Fill out register values */
if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 2;
} else {
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
}
@@ -671,7 +671,7 @@ I830SetupForScanlineImageWrite(ScrnInfoPtr pScrn, int rop,
/* Fill out register values */
if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 2;
} else {
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
}
commit 8971411781c5bd0b9e9d4c2c776ba6e21c313f00
Author: Eric Anholt <[EMAIL PROTECTED]>
Date: Tue Oct 14 11:33:33 2008 -0700
Fix broken stolen memory counting on G4X.
On the GM45 we were assuming too little stolen memory (mostly harmless,
except when it wasn't, until the AGP fix), and on the G45 we were assuming
too
much stolen memory, which was quite harmful when we touched the page that
didn't get mapped.
Future stolen memory accounting should use src/reg_dumper/intel_gtt before
and
after enabling AGP on the chipset to confirm that only the GTT entries not
mapped to stolen are replaced, and that all of the unmapped GTT entries are
replaced with the constant scratch page.
(cherry picked from commit 4dd00681dd0f9fce8dfd4592b46418edbbd2eeb4)
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 5269871..a9f4478 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -520,8 +520,8 @@ I830DetectMemory(ScrnInfoPtr pScrn)
range = gtt_size + 4;
/* new 4 series hardware has seperate GTT stolen with GFX stolen */
- if (IS_G4X(pI830))
- range = 0;
+ if (IS_G4X(pI830) || IS_GM45(pI830))
+ range = 4;
if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) {
switch (gmch_ctrl & I855_GMCH_GMS_MASK) {
commit b07141ef37f48c94dec7fae474f5a80d6a730ddc
Author: Carl Worth <[EMAIL PROTECTED]>
Date: Thu Oct 9 14:29:04 2008 -0700
Disable frame buffer compression by default for GM965.
We haven't found a way to make FBC work reliably with GM965 yet,
(it often fails to notice CPU writes). This appears to be a
specific problem with this device, (as we haven't gotten similar
bug reports for subsequent devices such as GM45). So FBC is
now disabled by default for GM965 but can still be enabled with
the FrameBufferCompression option for experimenting/debugging.
This resolves bug #16257:
[GM965 EXA] Frame-buffer compression broken for CPU writes (XPutImage)
https://bugs.freedesktop.org/show_bug.cgi?id=16257
(cherry picked from commit d24010b7b3f2419beb40dc5ae1e8aeb3e04b5a93)
diff --git a/src/i830.h b/src/i830.h
index def693f..0102b00 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -873,6 +873,13 @@ static inline int i830_fb_compression_supported(I830Ptr
pI830)
*/
if (!pI830->tiling || (IS_I965G(pI830) && !pI830->useEXA))
return FALSE;
+ /* We have not gotten FBC to work consistently on 965GM. Our best
+ * working theory right now is that FBC simply isn't reliable on
+ * that device. See this bug report for more details:
+ * https://bugs.freedesktop.org/show_bug.cgi?id=16257
+ */
+ if (IS_I965GM(pI830))
+ return FALSE;
return TRUE;
}
commit 06a02babd23de91d1b4b151467547ec2eca3de84
Author: Zhenyu Wang <[EMAIL PROTECTED]>
Date: Fri Sep 26 10:01:52 2008 +0800
Render register clock gating disable fix on 4 series chipset
(cherry picked from commit 1cc15ba454fdf54a7dea9da066e0a023a4742fab)
diff --git a/src/i810_reg.h b/src/i810_reg.h
index f4de874..f71fe9b 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -1121,6 +1121,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# define I965_DM_CLOCK_GATE_DISABLE (1 << 0)
#define RENCLK_GATE_D2 0x6208
+#define VF_UNIT_CLOCK_GATE_DISABLE (1 << 9)
+#define GS_UNIT_CLOCK_GATE_DISABLE (1 << 7)
+#define CL_UNIT_CLOCK_GATE_DISABLE (1 << 6)
#define RAMCLK_GATE_D 0x6210 /* CRL only */
#define DEUC 0x6214 /* CRL only */
diff --git a/src/i830_driver.c b/src/i830_driver.c
index c45de62..5269871 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -965,12 +965,18 @@ i830_init_clock_gating(ScrnInfoPtr pScrn)
/* Disable clock gating reported to work incorrectly according to the
specs.
*/
if (IS_GM45(pI830) || IS_G4X(pI830)) {
+ uint32_t dspclk_gate;
OUTREG(RENCLK_GATE_D1, 0);
- OUTREG(RENCLK_GATE_D2, 0);
+ OUTREG(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |
+ GS_UNIT_CLOCK_GATE_DISABLE |
+ CL_UNIT_CLOCK_GATE_DISABLE);
OUTREG(RAMCLK_GATE_D, 0);
- OUTREG(DSPCLK_GATE_D, VRHUNIT_CLOCK_GATE_DISABLE |
- OVRUNIT_CLOCK_GATE_DISABLE |
- OVCUNIT_CLOCK_GATE_DISABLE);
+ dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE |
+ OVRUNIT_CLOCK_GATE_DISABLE |
+ OVCUNIT_CLOCK_GATE_DISABLE;
+ if (IS_GM45(pI830))
+ dspclk_gate |= DSSUNIT_CLOCK_GATE_DISABLE;
+ OUTREG(DSPCLK_GATE_D, dspclk_gate);
} else if (IS_I965GM(pI830)) {
OUTREG(RENCLK_GATE_D1, I965_RCC_CLOCK_GATE_DISABLE);
OUTREG(RENCLK_GATE_D2, 0);
commit 9f7f67d96c527cf9b155104a439a4ca55aac4b9b
Author: Zhenyu Wang <[EMAIL PROTECTED]>
Date: Fri Sep 26 09:53:03 2008 +0800
Do force CRT detect sequence twice on 4 series chipset
(cherry picked from commit d6b2696f9ac14a81598e0147698209ad428fd45d)
diff --git a/src/i830_crt.c b/src/i830_crt.c
index 2a99f9c..26cf417 100644
--- a/src/i830_crt.c
+++ b/src/i830_crt.c
@@ -161,6 +161,14 @@ i830_crt_detect_hotplug(xf86OutputPtr output)
uint32_t temp;
const int timeout_ms = 1000;
int starttime, curtime;
+ int tries = 1;
+
+ /* On 4 series, CRT detect sequence need to be done twice for safe. */
+ if (IS_G4X(pI830))
+ tries = 2;
+
+retry:
+ tries--;
temp = INREG(PORT_HOTPLUG_EN);
@@ -173,6 +181,9 @@ i830_crt_detect_hotplug(xf86OutputPtr output)
break;
}
+ if (tries > 0)
+ goto retry;
+
if ((INREG(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
CRT_HOTPLUG_MONITOR_COLOR)
{
commit 3747b5e5eb69566a91eea533b0c3b18bcaccdd67
Author: Bryce Harrington <[EMAIL PROTECTED]>
Date: Mon Sep 22 18:38:35 2008 -0700
Add TV out quirk for HP Compaq nx6110
Adds a TV out quirk for HP Compaq nx6110. Fixes bz #17683.
(cherry picked from commit afa630b448e5993850433c9f0b129758ec4d37b5)
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index fcb418f..4f8a921 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -272,6 +272,8 @@ static i830_quirk i830_quirk_list[] = {
/* Samsung Q45 has no TV output */
{ PCI_CHIP_I965_GM, 0x144d, 0xc510, quirk_ignore_tv },
+ /* HP Compaq nx6110 has no TV output */
+ { PCI_CHIP_I915_GM, 0x103c, 0x099c, quirk_ignore_tv },
/* HP Compaq 6730s has no TV output */
{ PCI_CHIP_GM45_GM, 0x103c, 0x30e8, quirk_ignore_tv },
commit b9b97e180dfc8c66d1d101751b84439bd6615157
Author: Jesse Barnes <[EMAIL PROTECTED]>
Date: Mon Sep 22 13:11:55 2008 -0700
Add Cappuccino SlimPRO SP625F to no LVDS quirks list
Looks like this platform might contain VBTs that indicate an LFP is present
even though it isn't. Intended to fix bz #11368.
(cherry picked from commit 10909d9b665864bda2b1654de009d556cd068726)
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 0508824..fcb418f 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -220,6 +220,9 @@ static i830_quirk i830_quirk_list[] = {
{ PCI_CHIP_I965_GM, 0xa0a0, SUBSYS_ANY, quirk_ignore_lvds },
{ PCI_CHIP_I965_GM, 0x8086, 0x1999, quirk_ignore_lvds },
+ /* Cappuccino SlimPRO SP625F, bz #11368 */
+ { PCI_CHIP_I855_GM, 0x8086, 0x3582, quirk_ignore_lvds },
+
/* Apple Mac mini has no lvds, but macbook pro does */
{ PCI_CHIP_I945_GM, 0x8086, 0x7270, quirk_mac_mini },
commit 02580bc8dd453301a31562b2a064b2b1b3a5a3cf
Author: Zhenyu Wang <[EMAIL PROTECTED]>
Date: Thu Sep 11 16:14:47 2008 +0800
Add support for G41 chipset
G41 is another 4 series chipset like G45/43.
(cherry picked from commit ec17c88a0ed7c9cf4ad68aa52a7a891946a1c0f4)
diff --git a/src/common.h b/src/common.h
index 201eac2..a43035c 100644
--- a/src/common.h
+++ b/src/common.h
@@ -323,6 +323,11 @@ extern int I810_DEBUG;
#define PCI_CHIP_Q45_G_BRIDGE 0x2E10
#endif
+#ifndef PCI_CHIP_G41_G
+#define PCI_CHIP_G41_G 0x2E32
+#define PCI_CHIP_G41_G_BRIDGE 0x2E30
+#endif
+
#if XSERVER_LIBPCIACCESS
#define I810_MEMBASE(p,n) (p)->regions[(n)].base_addr
#define VENDOR_ID(p) (p)->vendor_id
@@ -355,7 +360,7 @@ extern int I810_DEBUG;
#define IS_I945G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_G)
#define IS_I945GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GM ||
DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GME)
#define IS_GM45(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_GM45_GM)
-#define IS_G4X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGD_E_G ||
DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G45_G || DEVICE_ID(pI810->PciInfo) ==
PCI_CHIP_Q45_G)
+#define IS_G4X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGD_E_G ||
DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G45_G || DEVICE_ID(pI810->PciInfo) ==
PCI_CHIP_Q45_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G41_G)
#define IS_I965GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM ||
DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G ||
DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G35_G || DEVICE_ID(pI810->PciInfo) ==
PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ ||
DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) ==
PCI_CHIP_I965_GME || IS_GM45(pI810) || IS_G4X(pI810))
#define IS_G33CLASS(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G33_G ||\
diff --git a/src/i810_driver.c b/src/i810_driver.c
index 8540646..36b6474 100644
--- a/src/i810_driver.c
+++ b/src/i810_driver.c
@@ -156,6 +156,7 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_DEVICE_MATCH (PCI_CHIP_IGD_E_G, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_G45_G, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_Q45_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_G41_G, 0 ),
{ 0, 0, 0 },
};
@@ -212,6 +213,7 @@ static SymTabRec I810Chipsets[] = {
{PCI_CHIP_IGD_E_G, "Intel Integrated Graphics Device"},
{PCI_CHIP_G45_G, "G45/G43"},
{PCI_CHIP_Q45_G, "Q45/Q43"},
+ {PCI_CHIP_G41_G, "G41"},
{-1, NULL}
};
@@ -245,6 +247,7 @@ static PciChipsets I810PciChipsets[] = {
{PCI_CHIP_IGD_E_G, PCI_CHIP_IGD_E_G, RES_SHARED_VGA},
{PCI_CHIP_G45_G, PCI_CHIP_G45_G, RES_SHARED_VGA},
{PCI_CHIP_Q45_G, PCI_CHIP_Q45_G, RES_SHARED_VGA},
+ {PCI_CHIP_G41_G, PCI_CHIP_G41_G, RES_SHARED_VGA},
{-1, -1, RES_UNDEFINED }
};
@@ -812,6 +815,7 @@ I810Probe(DriverPtr drv, int flags)
case PCI_CHIP_IGD_E_G:
case PCI_CHIP_G45_G:
case PCI_CHIP_Q45_G:
+ case PCI_CHIP_G41_G:
xf86SetEntitySharable(usedChips[i]);
/* Allocate an entity private if necessary */
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 8c6cb83..c45de62 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -255,6 +255,7 @@ static SymTabRec I830Chipsets[] = {
{PCI_CHIP_IGD_E_G, "Intel Integrated Graphics Device"},
{PCI_CHIP_G45_G, "G45/G43"},
{PCI_CHIP_Q45_G, "Q45/Q43"},
+ {PCI_CHIP_G41_G, "G41"},
{-1, NULL}
};
@@ -282,6 +283,7 @@ static PciChipsets I830PciChipsets[] = {
{PCI_CHIP_IGD_E_G, PCI_CHIP_IGD_E_G, RES_SHARED_VGA},
{PCI_CHIP_G45_G, PCI_CHIP_G45_G, RES_SHARED_VGA},
{PCI_CHIP_Q45_G, PCI_CHIP_Q45_G, RES_SHARED_VGA},
+ {PCI_CHIP_G41_G, PCI_CHIP_G41_G, RES_SHARED_VGA},
{-1, -1, RES_UNDEFINED}
};
@@ -1219,6 +1221,9 @@ i830_detect_chipset(ScrnInfoPtr pScrn)
case PCI_CHIP_Q45_G:
chipname = "Q45/Q43";
break;
+ case PCI_CHIP_G41_G:
+ chipname = "G41";
+ break;
default:
chipname = "unknown chipset";
break;
commit 350c1cd4839f7c9693f2bdabd23ab863e21d08e2
Author: Zhenyu Wang <[EMAIL PROTECTED]>
Date: Thu Sep 11 15:35:27 2008 +0800
Disable render standby
Render standby is known to cause possible hang issue on some
mobile chips, so always disable it.
[EMAIL PROTECTED]: fixed up to apply on 2.3.2]
diff --git a/src/i810_reg.h b/src/i810_reg.h
index cb47eaa..f4de874 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -2744,4 +2744,7 @@ typedef enum {
#define DPFC_STATUS2 0x3214
#define DPFC_FENCE_YOFF 0x3218
+#define MCHBAR_RENDER_STANDBY 0x111B8
+#define RENDER_STANDBY_ENABLE (1 << 30)
+
#endif /* _I810_REG_H */
diff --git a/src/i830_driver.c b/src/i830_driver.c
index e65340b..8c6cb83 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -2687,6 +2687,23 @@ i830_memory_init(ScrnInfoPtr pScrn)
return FALSE;
}
+static void
+i830_disable_render_standby(ScrnInfoPtr pScrn)
+{
+ I830Ptr pI830 = I830PTR(pScrn);
+ uint32_t render_standby;
+
+ /* Render Standby might cause hang issue, try always disable it.*/
+ if (IS_I965GM(pI830) || IS_GM45(pI830)) {
+ render_standby = INREG(MCHBAR_RENDER_STANDBY);
+ if (render_standby & RENDER_STANDBY_ENABLE) {
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Disable render standby.\n");
+ OUTREG(MCHBAR_RENDER_STANDBY,
+ (render_standby & (~RENDER_STANDBY_ENABLE)));
+ }
+ }
+}
+
static Bool
I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
{
@@ -3023,6 +3040,8 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int
argc, char **argv)
if (!vgaHWMapMem(pScrn))
return FALSE;
+ i830_disable_render_standby(pScrn);
+
DPRINTF(PFX, "assert( if(!I830EnterVT(scrnIndex, 0)) )\n");
if (!pI830->useEXA) {
commit f930266b35faedb08b4d627fa21d88d5e2463f91
Author: Daniel Stone <[EMAIL PROTECTED]>
Date: Fri Sep 5 05:02:08 2008 +0300
i830: Fix timer leak
TimerCancel just cancels the timer: it still leaves the TimerRec intact and
unfreed.
(cherry picked from commit b9ef0ed7d7b96eca6394cd0d367369ec511d1bcd)
diff --git a/src/i830_driver.c b/src/i830_driver.c
index ca36d18..e65340b 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -3222,7 +3222,7 @@ I830LeaveVT(int scrnIndex, int flags)
pI830->leaving = TRUE;
if (pI830->devicesTimer)
- TimerCancel(pI830->devicesTimer);
+ TimerFree(pI830->devicesTimer);
pI830->devicesTimer = NULL;
i830SetHotkeyControl(pScrn, HOTKEY_BIOS_SWITCH);
@@ -3455,7 +3455,7 @@ I830CloseScreen(int scrnIndex, ScreenPtr pScreen)
}
if (pI830->devicesTimer)
- TimerCancel(pI830->devicesTimer);
+ TimerFree(pI830->devicesTimer);
pI830->devicesTimer = NULL;
DPRINTF(PFX, "\nUnmapping memory\n");
@@ -3591,7 +3591,7 @@ I830PMEvent(int scrnIndex, pmEvent event, Bool undo)
/* If we had status checking turned on, turn it off now */
if (pI830->checkDevices) {
if (pI830->devicesTimer)
- TimerCancel(pI830->devicesTimer);
+ TimerFree(pI830->devicesTimer);
pI830->devicesTimer = NULL;
pI830->checkDevices = FALSE;
}
commit fd3212c44602cb46883e0dc75504d616cd23e18d
Author: Stefan Dirsch <[EMAIL PROTECTED]>
Date: Wed Sep 3 15:32:11 2008 +0200
Pipe A force quirk for Toshiba Satellite A30.
(cherry picked from commit fca7a4e9a5c73e1c129e94eeccf8fc795f729931)
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 297bc92..0508824 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -284,6 +284,8 @@ static i830_quirk i830_quirk_list[] = {
{ PCI_CHIP_I855_GM, 0x1028, 0x014f, quirk_pipea_force },
/* Dell Inspiron 510m needs pipe A force quirk */
{ PCI_CHIP_I855_GM, 0x1028, 0x0164, quirk_pipea_force },
+ /* Toshiba Satellite A30 needs pipe A force quirk */
+ { PCI_CHIP_I855_GM, 0x1179, 0xff00 , quirk_pipea_force },
/* Toshiba Protege R-205, S-209 needs pipe A force quirk */
{ PCI_CHIP_I915_GM, 0x1179, 0x0001, quirk_pipea_force },
/* Intel 855GM hardware (See LP: #216490) */
commit 5bafbd09add31fc58a6e569fde83bc743274a3b0
Author: Zhenyu Wang <[EMAIL PROTECTED]>
Date: Mon Aug 11 15:16:09 2008 +0800
Disable display clock gating for 4 series chips
(cherry picked from commit d0018a96064ee0adfe87c2d50c341bf7d2e45eb0)
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 6121b42..ca36d18 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -962,7 +962,7 @@ i830_init_clock_gating(ScrnInfoPtr pScrn)
/* Disable clock gating reported to work incorrectly according to the
specs.
*/
- if (IS_GM45(pI830)) {
+ if (IS_GM45(pI830) || IS_G4X(pI830)) {
OUTREG(RENCLK_GATE_D1, 0);
OUTREG(RENCLK_GATE_D2, 0);
OUTREG(RAMCLK_GATE_D, 0);
--
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