src/mesa/drivers/dri/i915/intel_pixel.c | 8 ++++----
src/mesa/drivers/dri/i965/brw_defines.h | 6 +++++-
src/mesa/drivers/dri/i965/intel_context.c | 6 ++++++
src/mesa/drivers/dri/i965/intel_context.h | 5 ++++-
src/mesa/main/image.c | 2 +-
src/mesa/main/mm.c | 8 ++++----
src/mesa/main/mm.h | 5 +++--
src/mesa/main/texstore.c | 6 ++++--
8 files changed, 31 insertions(+), 15 deletions(-)
New commits:
commit 2ac4919d24ad931eadc538add0a3fa353aa3aa10
Author: Xiang, Haihao <[EMAIL PROTECTED]>
Date: Wed Jun 18 15:48:45 2008 +0800
i965: add support for Intel 4 series chipsets
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index d60d6c2..3b0e0f6 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -850,7 +850,11 @@
#define R02_PRIM_END 0x1
#define R02_PRIM_START 0x2
-#define BRW_IS_IGD(brw) ((brw)->intel.intelScreen->deviceID ==
PCI_CHIP_IGD_GM)
+#define BRW_IS_IGD_GM(brw) ((brw)->intel.intelScreen->deviceID ==
PCI_CHIP_IGD_GM)
+#define BRW_IS_G4X(brw) (((brw)->intel.intelScreen->deviceID
== PCI_CHIP_IGD_E_G) || \
+ ((brw)->intel.intelScreen->deviceID
== PCI_CHIP_G45_G) || \
+ ((brw)->intel.intelScreen->deviceID
== PCI_CHIP_Q45_G))
+#define BRW_IS_IGD(brw) (BRW_IS_IGD_GM(brw) ||
BRW_IS_G4X(brw))
#define CMD_PIPELINE_SELECT(brw) ((BRW_IS_IGD(brw)) ?
CMD_PIPELINE_SELECT_IGD : CMD_PIPELINE_SELECT_965)
#define CMD_VF_STATISTICS(brw) ((BRW_IS_IGD(brw)) ?
CMD_VF_STATISTICS_IGD : CMD_VF_STATISTICS_965)
#define URB_SIZES(brw) ((BRW_IS_IGD(brw)) ? 384 : 256) /* 512
bit unit */
diff --git a/src/mesa/drivers/dri/i965/intel_context.c
b/src/mesa/drivers/dri/i965/intel_context.c
index 8591e5c..bcaf3a1 100644
--- a/src/mesa/drivers/dri/i965/intel_context.c
+++ b/src/mesa/drivers/dri/i965/intel_context.c
@@ -127,8 +127,14 @@ static const GLubyte *intelGetString( GLcontext *ctx,
GLenum name )
chipset = "Intel(R) 965GM"; break;
break;
case PCI_CHIP_IGD_GM:
+ case PCI_CHIP_IGD_E_G:
chipset = "Intel(R) Integrated Graphics Device";
break;
+ case PCI_CHIP_Q45_G:
+ chipset = "Intel(R) Q45/Q43"; break;
+ case PCI_CHIP_G45_G:
+ chipset = "Intel(R) G45/G43"; break;
+
default:
chipset = "Unknown Intel Chipset"; break;
}
diff --git a/src/mesa/drivers/dri/i965/intel_context.h
b/src/mesa/drivers/dri/i965/intel_context.h
index a588514..9986fd7 100644
--- a/src/mesa/drivers/dri/i965/intel_context.h
+++ b/src/mesa/drivers/dri/i965/intel_context.h
@@ -385,8 +385,11 @@ extern int INTEL_DEBUG;
#define PCI_CHIP_I946_GZ 0x2972
#define PCI_CHIP_I965_GM 0x2A02
-#define PCI_CHIP_IGD_GM 0x2A42
+#define PCI_CHIP_IGD_GM 0x2A42
+#define PCI_CHIP_IGD_E_G 0x2E02
+#define PCI_CHIP_Q45_G 0x2E12
+#define PCI_CHIP_G45_G 0x2E22
/* ================================================================
* intel_context.c:
commit 3ed89025f3df9e72afe0a77c847aab13b2ee861b
Author: Xiang, Haihao <[EMAIL PROTECTED]>
Date: Wed Jun 18 13:46:55 2008 +0800
i915: The pitch passed to intelEmitCopyBlitLocked should be in pixels,
not in bytes. Reported by Christopher Dissauer.
diff --git a/src/mesa/drivers/dri/i915/intel_pixel.c
b/src/mesa/drivers/dri/i915/intel_pixel.c
index 31ed5cf..c5005ba 100644
--- a/src/mesa/drivers/dri/i915/intel_pixel.c
+++ b/src/mesa/drivers/dri/i915/intel_pixel.c
@@ -228,7 +228,7 @@ intelTryReadPixels( GLcontext *ctx,
__DRIdrawablePrivate *dPriv = intel->driDrawable;
int nbox = dPriv->numClipRects;
int src_offset = intel->readRegion->offset;
- int src_pitch = intel->intelScreen->front.pitch;
+ int src_pitch = intel->intelScreen->front.pitch /
intel->intelScreen->cpp; /* in pixels */
int dst_offset = intelAgpOffsetFromVirtual( intel, pixels);
drm_clip_rect_t *box = dPriv->pClipRects;
int i;
@@ -308,7 +308,7 @@ static void do_draw_pix( GLcontext *ctx,
int nbox = dPriv->numClipRects;
int i;
int src_offset = intelAgpOffsetFromVirtual( intel, pixels);
- int src_pitch = pitch;
+ int src_pitch = pitch; /* in pixels */
assert(src_offset != ~0); /* should be caught earlier */
@@ -339,7 +339,7 @@ static void do_draw_pix( GLcontext *ctx,
intelEmitCopyBlitLocked( intel,
intel->intelScreen->cpp,
src_pitch, src_offset,
- intel->intelScreen->front.pitch,
+ intel->intelScreen->front.pitch /
intel->intelScreen->cpp, /* in pixels */
intel->drawRegion->offset,
bx - x, by - y,
bx, by,
commit 5b42bbce70ea093ee9a0e8fa7a0d42ddc4143832
Author: Xiang, Haihao <[EMAIL PROTECTED]>
Date: Wed Jun 18 13:38:53 2008 +0800
i915: fix data size in intelTryDrawPixels. Reported by Christopher Dissauer
diff --git a/src/mesa/drivers/dri/i915/intel_pixel.c
b/src/mesa/drivers/dri/i915/intel_pixel.c
index 535cbfc..31ed5cf 100644
--- a/src/mesa/drivers/dri/i915/intel_pixel.c
+++ b/src/mesa/drivers/dri/i915/intel_pixel.c
@@ -364,7 +364,7 @@ intelTryDrawPixels( GLcontext *ctx,
GLint pitch = unpack->RowLength ? unpack->RowLength : width;
GLuint dest;
GLuint cpp = intel->intelScreen->cpp;
- GLint size = width * pitch * cpp;
+ GLint size = height * pitch * cpp;
if (INTEL_DEBUG & DEBUG_PIXEL)
fprintf(stderr, "%s\n", __FUNCTION__);
commit d2e0a11aab98764300b9019483dc701117be3fea
Author: Brian Paul <[EMAIL PROTECTED]>
Date: Tue Jun 17 16:44:00 2008 -0600
mesa: fix inconsistent use of GL_UNSIGNED_INT vs. GL_UNSIGNED_INT_24_8_EXT
for Z unpacking
diff --git a/src/mesa/main/image.c b/src/mesa/main/image.c
index d7a96f7..94ddebc 100644
--- a/src/mesa/main/image.c
+++ b/src/mesa/main/image.c
@@ -3963,7 +3963,7 @@ _mesa_unpack_depth_span( const GLcontext *ctx, GLuint n,
DEPTH_VALUES(GLuint, UINT_TO_FLOAT);
break;
case GL_UNSIGNED_INT_24_8_EXT: /* GL_EXT_packed_depth_stencil */
- if (dstType == GL_UNSIGNED_INT &&
+ if (dstType == GL_UNSIGNED_INT_24_8_EXT &&
depthScale == (GLfloat) 0xffffff &&
ctx->Pixel.DepthScale == 1.0 &&
ctx->Pixel.DepthBias == 0.0) {
diff --git a/src/mesa/main/texstore.c b/src/mesa/main/texstore.c
index 2ac458b..ec97a01 100644
--- a/src/mesa/main/texstore.c
+++ b/src/mesa/main/texstore.c
@@ -2320,6 +2320,8 @@ _mesa_texstore_ycbcr(TEXSTORE_PARAMS)
GLboolean
_mesa_texstore_z24_s8(TEXSTORE_PARAMS)
{
+ const GLfloat depthScale = (GLfloat) 0xffffff;
+
ASSERT(dstFormat == &_mesa_texformat_z24_s8);
ASSERT(srcFormat == GL_DEPTH_STENCIL_EXT);
ASSERT(srcType == GL_UNSIGNED_INT_24_8_EXT);
@@ -2356,9 +2358,9 @@ _mesa_texstore_z24_s8(TEXSTORE_PARAMS)
GLint i;
/* the 24 depth bits will be in the high position: */
_mesa_unpack_depth_span(ctx, srcWidth,
- GL_UNSIGNED_INT, /* dst type */
+ GL_UNSIGNED_INT_24_8_EXT, /* dst type */
dstRow, /* dst addr */
- (GLfloat) 0xffffff, /* depthScale */
+ depthScale,
srcType, src, srcPacking);
/* get the 8-bit stencil values */
_mesa_unpack_stencil_span(ctx, srcWidth,
commit 47d046c93f7d6ea97feae193d201e74aebfd4394
Author: Brian Paul <[EMAIL PROTECTED]>
Date: Tue Jun 17 10:10:53 2008 -0600
mesa: make mm.c use unsigned ints for offsets.
If you have a GPU using this code and it has the offsets up in this space,
this fails.
cherry-picked from master
diff --git a/src/mesa/main/mm.c b/src/mesa/main/mm.c
index 846c329..fb7809e 100644
--- a/src/mesa/main/mm.c
+++ b/src/mesa/main/mm.c
@@ -53,7 +53,7 @@ mmDumpMemInfo(const struct mem_block *heap)
}
struct mem_block *
-mmInit(int ofs, int size)
+mmInit(unsigned int ofs, int size)
{
struct mem_block *heap, *block;
@@ -91,7 +91,7 @@ mmInit(int ofs, int size)
static struct mem_block *
SliceBlock(struct mem_block *p,
- int startofs, int size,
+ unsigned int startofs, int size,
int reserved, int alignment)
{
struct mem_block *newblock;
@@ -164,8 +164,8 @@ mmAllocMem(struct mem_block *heap, int size, int align2,
int startSearch)
{
struct mem_block *p;
const int mask = (1 << align2)-1;
- int startofs = 0;
- int endofs;
+ unsigned int startofs = 0;
+ unsigned int endofs;
if (!heap || align2 < 0 || size <= 0)
return NULL;
diff --git a/src/mesa/main/mm.h b/src/mesa/main/mm.h
index 26d59ff..5ad3ffd 100644
--- a/src/mesa/main/mm.h
+++ b/src/mesa/main/mm.h
@@ -39,7 +39,8 @@ struct mem_block {
struct mem_block *next, *prev;
struct mem_block *next_free, *prev_free;
struct mem_block *heap;
- int ofs,size;
+ unsigned int ofs;
+ int size;
unsigned int free:1;
unsigned int reserved:1;
};
@@ -50,7 +51,7 @@ struct mem_block {
* input: total size in bytes
* return: a heap pointer if OK, NULL if error
*/
-extern struct mem_block *mmInit(int ofs, int size);
+extern struct mem_block *mmInit(unsigned int ofs, int size);
/**
* Allocate 'size' bytes with 2^align2 bytes alignment,
--
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