ChangeLog | 133 +++++
debian/changelog | 7
src/AtomBios/includes/ObjectID.h | 928 +++++++++++++++++++-------------------
src/ati.c | 4
src/ati.h | 1
src/ati_pciids_gen.h | 3
src/atombios_crtc.c | 8
src/atombios_output.c | 6
src/generic_bus.h | 9
src/legacy_crtc.c | 72 +-
src/legacy_output.c | 109 ++--
src/pcidb/ati_pciids.csv | 15
src/radeon.h | 231 ++++-----
src/radeon_accel.c | 50 +-
src/radeon_accelfuncs.c | 12
src/radeon_atombios.c | 86 +--
src/radeon_atombios.h | 4
src/radeon_bios.c | 85 +--
src/radeon_chipinfo_gen.h | 15
src/radeon_chipset_gen.h | 3
src/radeon_commonfuncs.c | 6
src/radeon_crtc.c | 42 -
src/radeon_cursor.c | 20
src/radeon_dga.c | 10
src/radeon_dri.c | 16
src/radeon_driver.c | 153 +++---
src/radeon_exa.c | 22
src/radeon_exa_funcs.c | 38 -
src/radeon_exa_render.c | 68 +-
src/radeon_macros.h | 10
src/radeon_mm_i2c.c | 22
src/radeon_output.c | 344 +++++---------
src/radeon_pci_chipset_gen.h | 3
src/radeon_pci_device_match_gen.h | 3
src/radeon_probe.h | 468 +++++++++----------
src/radeon_reg.h | 19
src/radeon_render.c | 64 +-
src/radeon_textured_video.c | 6
src/radeon_textured_videofuncs.c | 12
src/radeon_tv.c | 100 ++--
src/radeon_video.c | 180 +++----
src/radeon_video.h | 36 -
src/radeon_vip.c | 42 -
src/theatre.c | 294 ++++++------
src/theatre.h | 56 +-
src/theatre200.c | 338 ++++++-------
src/theatre_detect.c | 14
src/theatre_reg.h | 306 ++++++------
48 files changed, 2331 insertions(+), 2142 deletions(-)
New commits:
commit 6c0946241fd255283392503bc664e976e9ef6e07
Author: Brice Goglin <[EMAIL PROTECTED]>
Date: Wed May 21 07:55:00 2008 +0200
Prepare changelog for upload
diff --git a/debian/changelog b/debian/changelog
index 6928681..6cbb54d 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,9 +1,9 @@
-xserver-xorg-video-ati (1:6.8.1~git20080521.04500c84-1) UNRELEASED; urgency=low
+xserver-xorg-video-ati (1:6.8.1~git20080521.04500c84-1) experimental;
urgency=low
* New upstream snapshot, up to commit 04500c84.
+ Fix lockup on startup on IGP320M, closes: #480312.
- -- Brice Goglin <[EMAIL PROTECTED]> Wed, 21 May 2008 07:49:23 +0200
+ -- Brice Goglin <[EMAIL PROTECTED]> Wed, 21 May 2008 07:54:45 +0200
xserver-xorg-video-ati (1:6.8.1~git20080512.94bf8f01-1) experimental;
urgency=low
commit ac999036632c9fbf0b6aa4ef2b9b00d65f88c9d4
Author: Brice Goglin <[EMAIL PROTECTED]>
Date: Wed May 21 07:54:40 2008 +0200
New upstream snapshot
diff --git a/ChangeLog b/ChangeLog
index 3a7699d..8627af0 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,136 @@
+commit 04500c8419b1aeaeac7968492b82e1d7cad1d05b
+Author: Alan Coopersmith <[EMAIL PROTECTED]>
+Date: Tue May 20 20:34:31 2008 -0700
+
+ Strip ^M's from src/AtomBios/includes/ObjectID.h
+
+commit 521a0488d1c414209c3534dc242000faa332a441
+Author: Alan Coopersmith <[EMAIL PROTECTED]>
+Date: Tue May 20 20:33:37 2008 -0700
+
+ On non-gcc compilers, use C99's __func__ instead of gcc's __FUNCTION__
+
+commit b7c80d0c86646105d2bce5d4d59ba6c45aa7cafc
+Author: Tobias Diedrich <[EMAIL PROTECTED]>
+Date: Tue May 20 19:16:54 2008 -0400
+
+ R200/R300: fix gamma setup for overlay
+
+ More pending. See bug 16001
+
+commit 69423482e2e94637142a9ba675589a1449a346a8
+Author: Alex Deucher <[EMAIL PROTECTED]>
+Date: Tue May 20 18:57:13 2008 -0400
+
+ RADEON: cleanup connection detection and remove duplicate code
+
+commit 55e4469f59c82bb5762673de5f3f27d18b0bd9a3
+Author: Alex Deucher <[EMAIL PROTECTED]>
+Date: Tue May 20 17:46:58 2008 -0400
+
+ RADEON: enable cloning on multi-crtc cards
+
+commit 12f185634071980041aaac6265d89708b181b215
+Author: Alex Deucher <[EMAIL PROTECTED]>
+Date: Tue May 20 16:05:41 2008 -0400
+
+ ATOM: Ignore invalid connector entries
+
+commit 19e97f74e39fc2b35727708ac429de33d0b70162
+Author: Egbert Eich <[EMAIL PROTECTED]>
+Date: Tue May 20 11:16:15 2008 +0200
+
+ Change RMX code to follow the programming algorithm suggested by ATI.
+
+ ATI provides the following algorithm to calculate the RMX scaling ratios
+ in its programming specs:
+ when RMX_AUTO_RATIO_HORZ_INC set to 1,Horizontal auto ratio result
trucated,
+ and then incremented by 1.
+ Horz_Ratio = ( ((Active display width in characters (including overscan) +
1)
+ / (Panel width in characters)) x 4096 + 1 )
+ else
+ Horz_Ratio = ( ((Active display width in characters (including overscan))
+ / (Panel width in characters)) x 4096 + 1 )
+
+ when RMX_AUTO_RATIO_VERT_INC set to 1, Vertical auto ratio result trucated,
+ and then incremented by 1.
+ Vert_Ration = ( ((Active display width in characters (including overscan)
+ 1)
+ / (Panel width in characters)) x 4096 + 1)
+ else
+ Vert_Ration = ( ((Active display width in characters (including overscan))
+ / (Panel width in characters)) x 4096 + 1)
+
+ This patch implements this behavor. Additionally it avoids the use of
floats.
+
+commit a4f3d0088ba763ed8eab1d331959b5ecde8262e8
+Author: Alex Deucher <[EMAIL PROTECTED]>
+Date: Tue May 20 11:42:53 2008 -0400
+
+ R3/4/5xx: fixup logic from last commit
+
+ Spotted by otaylor and MrCooper
+
+commit 130e55738047f2a073bcc47e3e1400f7b694a81b
+Author: Alex Deucher <[EMAIL PROTECTED]>
+Date: Tue May 20 11:32:42 2008 -0400
+
+ R3/4/5xx: fix EXA rotation
+
+ xrandr uses PictOpSrc for rotation which we were falling back on since
+ render semanties require alpha=0 for REPEAT_NONE when there is no alpha
+ channel and there is a transform. If the dst has no alpha channel we
+ should be ok I think.
+
+ Otayler and I discussed this on IRC. the more general fix would be
+ to clip the dst to the src and mask for bounded ops like in/add/over
+ in the pixel exact transform case.
+
+commit cc9f510770700228e5d597c872e926a4e99bd950
+Author: Corbin Simpson <[EMAIL PROTECTED]>
+Date: Wed May 14 16:49:01 2008 -0400
+
+ RADEON: missing stdint.h includes
+
+commit 71fa57f871dba03260dba2180ce1dab44048ac1a
+Author: Alex Deucher <[EMAIL PROTECTED](none)>
+Date: Wed May 14 13:36:38 2008 -0400
+
+ Add RS600 support
+
+commit 582c1a1b2c7b1032e9f9f54ca36100c57f580c5c
+Author: Alex Deucher <[EMAIL PROTECTED](none)>
+Date: Tue May 13 20:50:25 2008 -0400
+
+ RS4xx: Split out RS400 and RS480 as separate families
+
+ RS400 (intel based IGP) and RS480 (AMD based IGP) have different
+ MC setups and need to be handled differently
+
+commit 708e7c98f636738fbcc47a597bc94b309a4dc1c4
+Author: Michel Dänzer <[EMAIL PROTECTED]>
+Date: Tue May 13 11:00:38 2008 +0200
+
+ Reinstate CARD* types that are part of external interfaces.
+
+ The compiler pointed this out...
+
+commit 908b7b940e3ef296836bc94680ebb8ab67650e31
+Author: Matt Turner <[EMAIL PROTECTED]>
+Date: Mon May 12 12:06:33 2008 -0400
+
+ Replace CARD{8,16,32} with uint{8,16,32}_t
+
+ As has been done with xf86-video-intel, replace all CARD* datatypes with
+ uint*_t datatypes available from stdint.h.
+
+commit 87e66ce76430890ab4939ffcd42f72b9288eb598
+Author: Avi Rozen <[EMAIL PROTECTED]>
+Date: Mon May 12 08:33:38 2008 -0400
+
+ RADEON: fix lockup on start
+
+ see debian bug 480312
+
commit 94bf8f01bd43cb103fffecfe04d04a214f892baf
Author: Dave Airlie <[EMAIL PROTECTED]>
Date: Mon May 12 20:02:51 2008 +1000
diff --git a/debian/changelog b/debian/changelog
index a2a8f1f..6928681 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,10 @@
+xserver-xorg-video-ati (1:6.8.1~git20080521.04500c84-1) UNRELEASED; urgency=low
+
+ * New upstream snapshot, up to commit 04500c84.
+ + Fix lockup on startup on IGP320M, closes: #480312.
+
+ -- Brice Goglin <[EMAIL PROTECTED]> Wed, 21 May 2008 07:49:23 +0200
+
xserver-xorg-video-ati (1:6.8.1~git20080512.94bf8f01-1) experimental;
urgency=low
* New upstream snapshot, up to commit 94bf8f01.
commit 04500c8419b1aeaeac7968492b82e1d7cad1d05b
Author: Alan Coopersmith <[EMAIL PROTECTED]>
Date: Tue May 20 20:34:31 2008 -0700
Strip ^M's from src/AtomBios/includes/ObjectID.h
diff --git a/src/AtomBios/includes/ObjectID.h b/src/AtomBios/includes/ObjectID.h
index e6d41fe..4b106cf 100644
--- a/src/AtomBios/includes/ObjectID.h
+++ b/src/AtomBios/includes/ObjectID.h
@@ -18,467 +18,467 @@
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
-*/
-/* based on stg/asic_reg/drivers/inc/asic_reg/ObjectID.h ver 23 */
-
-#ifndef _OBJECTID_H
-#define _OBJECTID_H
-
-#if defined(_X86_)
-#pragma pack(1)
-#endif
-
-/****************************************************/
-/* Graphics Object Type Definition */
-/****************************************************/
-#define GRAPH_OBJECT_TYPE_NONE 0x0
-#define GRAPH_OBJECT_TYPE_GPU 0x1
-#define GRAPH_OBJECT_TYPE_ENCODER 0x2
-#define GRAPH_OBJECT_TYPE_CONNECTOR 0x3
-#define GRAPH_OBJECT_TYPE_ROUTER 0x4
-/* deleted */
-
-/****************************************************/
-/* Encoder Object ID Definition */
-/****************************************************/
-#define ENCODER_OBJECT_ID_NONE 0x00
-
-/* Radeon Class Display Hardware */
-#define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01
-#define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02
-#define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03
-#define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04
-#define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */
-#define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06
-#define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07
-
-/* External Third Party Encoders */
-#define ENCODER_OBJECT_ID_SI170B 0x08
-#define ENCODER_OBJECT_ID_CH7303 0x09
-#define ENCODER_OBJECT_ID_CH7301 0x0A
-#define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to
Radeon Class Display Hardware */
-#define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C
-#define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D
-#define ENCODER_OBJECT_ID_TITFP513 0x0E
-#define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for
Radeon */
-#define ENCODER_OBJECT_ID_VT1623 0x10
-#define ENCODER_OBJECT_ID_HDMI_SI1930 0x11
-#define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12
-/* Kaleidoscope (KLDSCP) Class Display Hardware (internal) */
-#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13
-#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14
-#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15
-#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV
and CRT */
-#define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual
link, no HDCP.) */
-#define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */
-#define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19
-#define ENCODER_OBJECT_ID_VT1625 0x1A
-#define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B
-#define ENCODER_OBJECT_ID_DP_AN9801 0x1C
-#define ENCODER_OBJECT_ID_DP_DP501 0x1D
-#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY 0x1E
-#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA 0x1F
-
-/****************************************************/
-/* Connector Object ID Definition */
-/****************************************************/
-#define CONNECTOR_OBJECT_ID_NONE 0x00
-#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01
-#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02
-#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03
-#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D 0x04
-#define CONNECTOR_OBJECT_ID_VGA 0x05
-#define CONNECTOR_OBJECT_ID_COMPOSITE 0x06
-#define CONNECTOR_OBJECT_ID_SVIDEO 0x07
-#define CONNECTOR_OBJECT_ID_YPbPr 0x08
-#define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09
-#define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV &
TV */
-#define CONNECTOR_OBJECT_ID_SCART 0x0B
-#define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C
-#define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D
-#define CONNECTOR_OBJECT_ID_LVDS 0x0E
-#define CONNECTOR_OBJECT_ID_7PIN_DIN 0x0F
-#define CONNECTOR_OBJECT_ID_PCIE_CONNECTOR 0x10
-#define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11
-#define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12
-#define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13
-
-/* deleted */
-
-/****************************************************/
-/* Router Object ID Definition */
-/****************************************************/
-#define ROUTER_OBJECT_ID_NONE
0x00
-#define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01
-
-/****************************************************/
-// Graphics Object ENUM ID Definition */
-/****************************************************/
-#define GRAPH_OBJECT_ENUM_ID1 0x01
-#define GRAPH_OBJECT_ENUM_ID2 0x02
-#define GRAPH_OBJECT_ENUM_ID3 0x03
-#define GRAPH_OBJECT_ENUM_ID4 0x04
-
-/****************************************************/
-/* Graphics Object ID Bit definition */
-/****************************************************/
-#define OBJECT_ID_MASK 0x00FF
-#define ENUM_ID_MASK 0x0700
-#define RESERVED1_ID_MASK 0x0800
-#define OBJECT_TYPE_MASK 0x7000
-#define RESERVED2_ID_MASK 0x8000
-
-#define OBJECT_ID_SHIFT 0x00
-#define ENUM_ID_SHIFT 0x08
-#define OBJECT_TYPE_SHIFT 0x0C
-
-
-/****************************************************/
-/* Graphics Object family definition */
-/****************************************************/
-#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID)
(GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
-
GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT)
-/****************************************************/
-/* GPU Object ID definition - Shared with BIOS */
-/****************************************************/
-#define GPU_ENUM_ID1 ( GRAPH_OBJECT_TYPE_GPU <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT)
-
-/****************************************************/
-/* Encoder Object ID definition - Shared with BIOS */
-/****************************************************/
-/*
-#define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101
-#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102
-#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103
-#define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104
-#define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105
-#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106
-#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107
-#define ENCODER_SIL170B_ENUM_ID1 0x2108
-#define ENCODER_CH7303_ENUM_ID1 0x2109
-#define ENCODER_CH7301_ENUM_ID1 0x210A
-#define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B
-#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 0x210C
-#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 0x210D
-#define ENCODER_TITFP513_ENUM_ID1 0x210E
-#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 0x210F
-#define ENCODER_VT1623_ENUM_ID1 0x2110
-#define ENCODER_HDMI_SI1930_ENUM_ID1 0x2111
-#define ENCODER_HDMI_INTERNAL_ENUM_ID1 0x2112
-#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113
-#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114
-#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115
-#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116
-#define ENCODER_SI178_ENUM_ID1 0x2117
-#define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118
-#define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119
-#define ENCODER_VT1625_ENUM_ID1 0x211A
-#define ENCODER_HDMI_SI1932_ENUM_ID1 0x211B
-#define ENCODER_ENCODER_DP_AN9801_ENUM_ID1 0x211C
-#define ENCODER_DP_DP501_ENUM_ID1 0x211D
-#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 0x211E
-*/
-#define ENCODER_INTERNAL_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_INTERNAL_LVDS
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_INTERNAL_TMDS1
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_INTERNAL_TMDS2
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_INTERNAL_DAC1
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_INTERNAL_DAC2
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_INTERNAL_SDVOA
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_INTERNAL_SDVOA
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_INTERNAL_SDVOB
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_SIL170B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_SI170B <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_CH7303_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_CH7303 <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_CH7301_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_CH7301 <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_INTERNAL_DVO1
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_EXTERNAL_SDVOA
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_EXTERNAL_SDVOA
<< OBJECT_ID_SHIFT)
-
-
-#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_EXTERNAL_SDVOB
<< OBJECT_ID_SHIFT)
-
-
-#define ENCODER_TITFP513_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_TITFP513 <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_INTERNAL_LVTM1
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_VT1623_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_VT1623 <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_HDMI_SI1930_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_HDMI_SI1930 <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_HDMI_INTERNAL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_HDMI_INTERNAL
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
-
-
-#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
-
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
-
-
-#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) // Shared with
CV/TV and CRT
-
-#define ENCODER_SI178_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_SI178 <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_MVPU_FPGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_MVPU_FPGA
<< OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DDI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_INTERNAL_DDI <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_VT1625_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_VT1625 <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_HDMI_SI1932_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_HDMI_SI1932 <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_DP_DP501_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_DP_DP501 <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_DP_AN9801_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- ENCODER_OBJECT_ID_DP_AN9801 <<
OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
-
ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
-
-/****************************************************/
-/* Connector Object ID definition - Shared with BIOS */
-/****************************************************/
-/*
-#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 0x3101
-#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 0x3102
-#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 0x3103
-#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 0x3104
-#define CONNECTOR_VGA_ENUM_ID1 0x3105
-#define CONNECTOR_COMPOSITE_ENUM_ID1 0x3106
-#define CONNECTOR_SVIDEO_ENUM_ID1 0x3107
-#define CONNECTOR_YPbPr_ENUM_ID1 0x3108
-#define CONNECTOR_D_CONNECTORE_ENUM_ID1 0x3109
-#define CONNECTOR_9PIN_DIN_ENUM_ID1 0x310A
-#define CONNECTOR_SCART_ENUM_ID1 0x310B
-#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 0x310C
-#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 0x310D
-#define CONNECTOR_LVDS_ENUM_ID1 0x310E
-#define CONNECTOR_7PIN_DIN_ENUM_ID1 0x310F
-#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 0x3110
-*/
-#define CONNECTOR_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- CONNECTOR_OBJECT_ID_LVDS <<
OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_VGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- CONNECTOR_OBJECT_ID_VGA <<
OBJECT_ID_SHIFT)
-
-#define CONNECTOR_VGA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
- CONNECTOR_OBJECT_ID_VGA <<
OBJECT_ID_SHIFT)
-
-#define CONNECTOR_COMPOSITE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- CONNECTOR_OBJECT_ID_COMPOSITE
<< OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SVIDEO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- CONNECTOR_OBJECT_ID_SVIDEO <<
OBJECT_ID_SHIFT)
-
-#define CONNECTOR_YPbPr_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- CONNECTOR_OBJECT_ID_YPbPr <<
OBJECT_ID_SHIFT)
-
-#define CONNECTOR_D_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_9PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- CONNECTOR_OBJECT_ID_9PIN_DIN
<< OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SCART_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- CONNECTOR_OBJECT_ID_SCART <<
OBJECT_ID_SHIFT)
-
-#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_7PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- CONNECTOR_OBJECT_ID_7PIN_DIN
<< OBJECT_ID_SHIFT)
-
-#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_CROSSFIRE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
- CONNECTOR_OBJECT_ID_CROSSFIRE
<< OBJECT_ID_SHIFT)
-
-#define CONNECTOR_CROSSFIRE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
- CONNECTOR_OBJECT_ID_CROSSFIRE
<< OBJECT_ID_SHIFT)
-
-
-#define CONNECTOR_HARDCODE_DVI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_HARDCODE_DVI_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DISPLAYPORT_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DISPLAYPORT_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR
<< OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
-
CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
-
-/****************************************************/
-/* Router Object ID definition - Shared with BIOS */
-/****************************************************/
-#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ROUTER <<
OBJECT_TYPE_SHIFT |\
- GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
-
ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
-
-/* deleted */
-
-/****************************************************/
-/* Object Cap definition - Shared with BIOS */
-/****************************************************/
-#define GRAPHICS_OBJECT_CAP_I2C 0x00000001L
-#define GRAPHICS_OBJECT_CAP_TABLE_ID 0x00000002L
-
-
-#define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID 0x01
-#define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID 0x02
-#define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID 0x03
-
-#if defined(_X86_)
-#pragma pack()
-#endif
-
-#endif /*GRAPHICTYPE */
-
-
-
-
+*/
+/* based on stg/asic_reg/drivers/inc/asic_reg/ObjectID.h ver 23 */
+
+#ifndef _OBJECTID_H
+#define _OBJECTID_H
+
+#if defined(_X86_)
+#pragma pack(1)
+#endif
+
+/****************************************************/
+/* Graphics Object Type Definition */
+/****************************************************/
+#define GRAPH_OBJECT_TYPE_NONE 0x0
+#define GRAPH_OBJECT_TYPE_GPU 0x1
+#define GRAPH_OBJECT_TYPE_ENCODER 0x2
+#define GRAPH_OBJECT_TYPE_CONNECTOR 0x3
+#define GRAPH_OBJECT_TYPE_ROUTER 0x4
+/* deleted */
+
+/****************************************************/
+/* Encoder Object ID Definition */
+/****************************************************/
+#define ENCODER_OBJECT_ID_NONE 0x00
+
+/* Radeon Class Display Hardware */
+#define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01
+#define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02
+#define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03
+#define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04
+#define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */
+#define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06
+#define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07
+
+/* External Third Party Encoders */
+#define ENCODER_OBJECT_ID_SI170B 0x08
+#define ENCODER_OBJECT_ID_CH7303 0x09
+#define ENCODER_OBJECT_ID_CH7301 0x0A
+#define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to
Radeon Class Display Hardware */
+#define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C
+#define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D
+#define ENCODER_OBJECT_ID_TITFP513 0x0E
+#define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for
Radeon */
+#define ENCODER_OBJECT_ID_VT1623 0x10
+#define ENCODER_OBJECT_ID_HDMI_SI1930 0x11
+#define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12
+/* Kaleidoscope (KLDSCP) Class Display Hardware (internal) */
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV
and CRT */
+#define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual
link, no HDCP.) */
+#define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */
+#define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19
+#define ENCODER_OBJECT_ID_VT1625 0x1A
+#define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B
+#define ENCODER_OBJECT_ID_DP_AN9801 0x1C
+#define ENCODER_OBJECT_ID_DP_DP501 0x1D
+#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY 0x1E
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA 0x1F
+
+/****************************************************/
+/* Connector Object ID Definition */
+/****************************************************/
+#define CONNECTOR_OBJECT_ID_NONE 0x00
+#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01
+#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02
+#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03
+#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D 0x04
+#define CONNECTOR_OBJECT_ID_VGA 0x05
+#define CONNECTOR_OBJECT_ID_COMPOSITE 0x06
+#define CONNECTOR_OBJECT_ID_SVIDEO 0x07
+#define CONNECTOR_OBJECT_ID_YPbPr 0x08
+#define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09
+#define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV &
TV */
+#define CONNECTOR_OBJECT_ID_SCART 0x0B
+#define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C
+#define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D
+#define CONNECTOR_OBJECT_ID_LVDS 0x0E
+#define CONNECTOR_OBJECT_ID_7PIN_DIN 0x0F
+#define CONNECTOR_OBJECT_ID_PCIE_CONNECTOR 0x10
+#define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11
+#define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12
+#define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13
+
+/* deleted */
+
+/****************************************************/
+/* Router Object ID Definition */
+/****************************************************/
+#define ROUTER_OBJECT_ID_NONE
0x00
+#define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01
+
+/****************************************************/
+// Graphics Object ENUM ID Definition */
+/****************************************************/
+#define GRAPH_OBJECT_ENUM_ID1 0x01
+#define GRAPH_OBJECT_ENUM_ID2 0x02
+#define GRAPH_OBJECT_ENUM_ID3 0x03
+#define GRAPH_OBJECT_ENUM_ID4 0x04
+
+/****************************************************/
+/* Graphics Object ID Bit definition */
+/****************************************************/
+#define OBJECT_ID_MASK 0x00FF
+#define ENUM_ID_MASK 0x0700
+#define RESERVED1_ID_MASK 0x0800
+#define OBJECT_TYPE_MASK 0x7000
+#define RESERVED2_ID_MASK 0x8000
+
+#define OBJECT_ID_SHIFT 0x00
+#define ENUM_ID_SHIFT 0x08
+#define OBJECT_TYPE_SHIFT 0x0C
+
+
+/****************************************************/
+/* Graphics Object family definition */
+/****************************************************/
+#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID)
(GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
+
GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT)
+/****************************************************/
+/* GPU Object ID definition - Shared with BIOS */
+/****************************************************/
+#define GPU_ENUM_ID1 ( GRAPH_OBJECT_TYPE_GPU <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT)
+
+/****************************************************/
+/* Encoder Object ID definition - Shared with BIOS */
+/****************************************************/
+/*
+#define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101
+#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102
+#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103
+#define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104
+#define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106
+#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107
+#define ENCODER_SIL170B_ENUM_ID1 0x2108
+#define ENCODER_CH7303_ENUM_ID1 0x2109
+#define ENCODER_CH7301_ENUM_ID1 0x210A
+#define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 0x210C
+#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 0x210D
+#define ENCODER_TITFP513_ENUM_ID1 0x210E
+#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 0x210F
+#define ENCODER_VT1623_ENUM_ID1 0x2110
+#define ENCODER_HDMI_SI1930_ENUM_ID1 0x2111
+#define ENCODER_HDMI_INTERNAL_ENUM_ID1 0x2112
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113
+#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114
+#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115
+#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116
+#define ENCODER_SI178_ENUM_ID1 0x2117
+#define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118
+#define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119
+#define ENCODER_VT1625_ENUM_ID1 0x211A
+#define ENCODER_HDMI_SI1932_ENUM_ID1 0x211B
+#define ENCODER_ENCODER_DP_AN9801_ENUM_ID1 0x211C
+#define ENCODER_DP_DP501_ENUM_ID1 0x211D
+#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 0x211E
+*/
+#define ENCODER_INTERNAL_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_LVDS
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_TMDS1
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_TMDS2
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_DAC1
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_DAC2
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_SDVOA
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_SDVOA
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_SDVOB
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_SIL170B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_SI170B <<
OBJECT_ID_SHIFT)
+
+#define ENCODER_CH7303_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_CH7303 <<
OBJECT_ID_SHIFT)
+
+#define ENCODER_CH7301_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_CH7301 <<
OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_DVO1
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_EXTERNAL_SDVOA
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_EXTERNAL_SDVOA
<< OBJECT_ID_SHIFT)
+
+
+#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_EXTERNAL_SDVOB
<< OBJECT_ID_SHIFT)
+
+
+#define ENCODER_TITFP513_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_TITFP513 <<
OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_LVTM1
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_VT1623_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_VT1623 <<
OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_SI1930_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_HDMI_SI1930 <<
OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_INTERNAL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_HDMI_INTERNAL
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
+
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) // Shared with
CV/TV and CRT
+
+#define ENCODER_SI178_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_SI178 <<
OBJECT_ID_SHIFT)
+
+#define ENCODER_MVPU_FPGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER
<< OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_MVPU_FPGA
<< OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DDI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_DDI <<
OBJECT_ID_SHIFT)
+
+#define ENCODER_VT1625_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_VT1625 <<
OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_SI1932_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER <<
OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_HDMI_SI1932 <<
OBJECT_ID_SHIFT)
+
--
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