Taketoshi Sano wrote:
> So the log in 8bit > (**) CHIPS(0): Default mode "1024x768": 94.5 MHz, 68.7 kHz, 85.0 Hz > shows this is not correct setting, but the log in 16bit > shows this is closer to right setting. > > In this case, you should tune just the dotclock setting and hsync/vrefresh > in your XF86Config-4 file without UseModeline option. > > Option SetMClk is removed, and new options FPClock8, FPClock16, > FPClock24, and FPClock32 are added. Maybe you can use these > to order a specific Video Clock speed. When you enable the > FPClock16 option, are there any difference in the X log ? > How it goes with "FPClock16" "77.1" option ? The FPClock options and SetMclk options are overridden by the server as you can see from the excerpt from the XFree86.0.log file: (--) CHIPS(0): Using programmable clocks (--) CHIPS(0): Dot clock 0: 25.172 MHz (--) CHIPS(0): Dot clock 1: 28.325 MHz CRTclk (--) CHIPS(0): Dot clock 2: 65.082 MHz FPclk (--) CHIPS(0): Memory clock of 77.099 MHz exceeds limit of 55.000 MHz (==) CHIPS(0): Min pixel clock is 11.000 MHz (--) CHIPS(0): Max pixel clock is 56.125 MHz (**) CHIPS(0): FP clock 65.082 MHz requested (II) CHIPS(0): FP clock set to 50.512 MHz This suggests to me that I cannot create the illusion of a faster dot clock. Right? I have tried changing the horizontal and vertical refresh limits. Either modelines tell me certain values are out of range, or when I change the range to include them, it tells me they are invalid, e.g., (WW) CHIPS(0): Mode "[EMAIL PROTECTED]" deleted (hsync out of range) (WW) CHIPS(0): Mode "[EMAIL PROTECTED]" deleted (bad mode clock/interlace/doublescan) > Maybe you can try: > ModeLine "[EMAIL PROTECTED]" 55.6 1024 1072 1168 1376 768 769 772 808 > I'm not sure if this works or not. But this modeline will not be > deleted in X log. Perhaps you have to lower the vertrefresh limit > to 40 or so to enable this modeline... > > GetModeLine - hdsp: 1024 hbeg: 1072 hend: 1168 httl: 1376 > vdsp: 768 vbeg: 769 vend: 772 vttl: 808 flags: 5 > > So this modeline "1024 1072 1168 1376 768 769 772 808" can be used > for base calculation, I think. I have tried varying the following modelines (changing the dotclock?) entry 55.6, 56.125. The first has entries suggested by the current xserver in 8bit mode (as you suggest above). The latter is the exact modeline that worked in 3.3.6 ModeLine "[EMAIL PROTECTED]" 55.6 1024 1072 1168 1376 768 769 772 808 ModeLine "[EMAIL PROTECTED]" 56.125 1024 1048 1208 1264 768 776 784 817 One other interesting bit of information. If I use only the option UseModeLine, I get a screen with a black vertical band on the left (about 4cm wide), and the rest white. If I also use the FixPanelSize option, the black vertical band eventually locks in as my normal background color. It's just that I have a 150 x 768 panel. Since the xserver won't allow me to adjust the dot clock, can you suggest a systematic way of testing modelines? Right now my efforts are fairly random. Thanks Tom -- Thomas R. Shemanske (Mailing Address) (Office/Internet Information) Department of Mathematics 203 Choate House 6188 Bradley Hall [EMAIL PROTECTED] Dartmouth College http://www.math.dartmouth.edu/~trs/ Hanover, NH 03755-3551 (603) 646 - 3179 Directions: http://www.math.dartmouth.edu/~trs/choatehouse.html Office hours: http://www.math.dartmouth.edu/~trs/frontmatter/office.html Fall Term Office Hours: M, F: 2:30 - 4:00 Tu: 9:00 - 10:30
