Timo Aaltonen pushed to branch upstream-experimental at X Strike Force / lib / mesa
Commits: d41acb4c by Dylan Baker at 2019-04-11T03:40:42Z docs: Add sha256 sums for 19.0.2 - - - - - aacefed5 by Eric Engestrom at 2019-04-12T20:36:49Z meson: remove meson-created megadrivers symlinks Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110356 Fixes: aa7afe324c2092fb31f9 "meson: strip rpath from megadrivers" Signed-off-by: Eric Engestrom <eric.engest...@intel.com> Tested-by: Mike Lothian <m...@fireburn.co.uk> Reviewed-by: Eric Anholt <e...@anholt.net> (cherry picked from commit c77acc3ceba711ec3790fb674aeb8c6a25433741) - - - - - f9eaa873 by Jason Ekstrand at 2019-04-12T20:36:49Z anv/pipeline: Fix MEDIA_VFE_STATE::PerThreadScratchSpace on gen7 We were always programming it with the Broadwell convention which is too large by a factor of two on Haswell and just plain wrong on IVB and BYT. Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com> Cc: mesa-sta...@lists.freedesktop.org (cherry picked from commit 7eaaff18cb6109dd6c4c58de5a4d3be1362b21ae) - - - - - 2e636862 by Kenneth Graunke at 2019-04-12T20:36:49Z glsl: Set location on structure-split sampler uniform variables gl_nir_lower_samplers_as_deref splits structure uniform variables, creating new variables for individual fields. As part of that, it calculates a new location. It then never set this on the new variables. Thanks to Michael Fiano for finding this bug. Fixes crashes on i965 with Piglit's new tests/spec/glsl-1.10/execution/samplers/uniform-struct test, which was reduced from the failing case in Michael's app. Fixes: f003859f97c nir: Make gl_nir_lower_samplers use gl_nir_lower_samplers_as_deref Reviewed-by: Timothy Arceri <tarc...@itsqueeze.com> (cherry picked from commit 9e0c744f07a21fc7bb018a77cf83b057436d0d1b) - - - - - 332da02f by Andres Gomez at 2019-04-13T00:18:40Z glsl/linker: location aliasing requires types to have the same width >From the OpenGL 4.60.5 spec, section 4.4.1 Input Layout Qualifiers, Page 67, (Location aliasing): " Further, when location aliasing, the aliases sharing the location must have the same underlying numerical type and bit width (floating-point or integer, 32-bit versus 64-bit, etc.) and the same auxiliary storage and interpolation qualification." Additionally, we have improved the linker error descriptions. Specifically, when taking structs into account we were producing a linker error because we assumed that all components in each location were used and that would cause component aliasing. This is not accurate of the actual problem. Now, the failure specifies that the underlying numerical type incompatibility is the cause for the failure. Fixes the following piglit test: tests/spec/arb_enhanced_layouts/linker/component-layout/vs-to-fs-width-mismatch-double-float.shader_test v2: - Do not assert if we see invalid numerical types. These come straight from shader code, so we should produce linker errors if shaders attempt to do location aliasing on variables that are not numerical such as records. - While we are at it, improve error reporting for the case of numerical type mismatch to include the shader stage. v3: - Allow location aliasing of images and samplers. If we get these it means bindless support is active and they should be handled as 64-bit integers (Ilia) - Make sure we produce link errors for any non-numerical type for which we attempt location aliasing, not just structs. v4: - Rebased with minor fixes (Andres). - Added fixing tag to the commit log (Andres). v5: - Remove the helper function and check individually for the underlying numerical type and bit width (Timothy). - Implicitly, assume that any non-treated type which is checked for its underlying numerical type is either integer or float and has a defined bit width (Timothy). - Implicitly, assume that structs are the only non-treated non-numerical type (Timothy). - Improve the linker error descriptions and commit log (Andres). Fixes: 13652e7516a ("glsl/linker: Fix type checks for location aliasing") Cc: Ilia Mirkin <imir...@alum.mit.edu> Cc: Timothy Arceri <tarc...@itsqueeze.com> Cc: Iago Toral Quiroga <ito...@igalia.com> Signed-off-by: Andres Gomez <ago...@igalia.com> Reviewed-by: Timothy Arceri <tarc...@itsqueeze.com> (cherry picked from commit 75a3dd97aaeb5fea72ab432c8e9f4bd4e50877ed) [Andres Gomez: is_record() instead of is_struct() and brought glsl_base_type_get_bit_size] Signed-off-by: Andres Gomez <ago...@igalia.com> - - - - - 77dbb70e by Rhys Perry at 2019-04-16T16:43:10Z nir,ac/nir: fix cube_face_coord Seems it was missing the "/ ma + 0.5" and the order was swapped. Fixes: a1a2a8dfda7b9cac7e ('nir: add AMD_gcn_shader extended instructions') Signed-off-by: Rhys Perry <pendingchao...@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> (cherry picked from commit 8671cfe2a203f2d5492eb22eeb2694e0e37239d9) - - - - - 0ffd4c74 by Bas Nieuwenhuizen at 2019-04-16T16:43:18Z ac: Move has_local_buffers disable to radeonsi. In radv we had a separate flag to actually use it + an env option to experimentally use it. The common code setting has_local_buffers to false of course broke that experimental option. Also the "enable on APU" did not make sense for RADV as it is still disabled by default. Fixes: b21a4efb553 "radv/winsys: allow local BOs on APUs" Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> (cherry picked from commit af9534b9f3f687f3603e621bf282f4c546240afa) - - - - - ce4b6974 by Roland Scheidegger at 2019-04-16T16:43:25Z gallivm: fix bogus assert in get_indirect_index 0 is a valid value as max index, and the code handles it fine. This isn't commonly seen, as it will only happen with array declarations of size 1. Fixes piglit tests/shaders/complex-loop-analysis-bug.shader_test Fixes: a3c898dc97ec "gallivm: fix improper clamping of vertex index when fetching gs inputs" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110441 Reviewed-by: Brian Paul <bri...@vmware.com> (cherry picked from commit 88e0bbf24aa82000195d10c7873f881d190b825b) - - - - - 34003594 by Chia-I Wu at 2019-04-16T16:43:32Z virgl: fix fence fd version check Fixes: d1a1c21e762 ("virgl: native fence fd support") Signed-off-by: Chia-I Wu <olva...@gmail.com> Reviewed-by: Emil Velikov <emil.veli...@collabora.com> (cherry picked from commit c45c889f95b07cc95cf5ad6fdefc2fa9bb66b960) - - - - - bde36e07 by Danylo Piliaiev at 2019-04-16T16:43:38Z intel/compiler: Do not reswizzle dst if instruction writes to flag register If we write to the flag register changing the swizzle would change what channels are written to the flag register. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110201 Fixes: 4cd1a0be Signed-off-by: Danylo Piliaiev <danylo.pilia...@globallogic.com> Reviewed-by: <ian.d.roman...@intel.com> (cherry picked from commit 04508f57d1d36587f3cc048f0f5dae0611f9330c) - - - - - 32e08b23 by Juan A. Suarez Romero at 2019-04-17T19:47:45Z meson: Add dependency on genxml to anvil genfiles This fixes a race condition where anv_gen_files are executed before genxml files, which causes a build failure v2: add dependency on idep_genxml (Lionel) Fixes: d1992255bb29054fa51763376d125183a9f602f ("meson: Add build Intel "anv" vulkan driver") Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com> (cherry picked from commit b74e605cf47fe54c0d2a6df072c1874160cfd9eb) - - - - - 23abb7d3 by Lionel Landwerlin at 2019-04-18T23:18:46Z anv: fix uninitialized pthread cond clock domain Signed-off-by: Lionel Landwerlin <lionel.g.landwer...@intel.com> Fixes: 843775bab78a6b ("anv: Rework fences") Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net> (cherry picked from commit dfd79079daf08cba0e1d5defc18dedeffb0c6327) - - - - - b5ea4378 by Samuel Pitoiset at 2019-04-22T16:06:26Z ac/nir: only use the new raw/struct image atomic intrinsics with LLVM 9+ They are buggy with LLVM 8 because they weren't marked as source of divergence, see r358579. Fixes: dd0172e865f ("radv: Use structured intrinsics instead of indexing workaround for GFX9.")" Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Reviewed-by: Timothy Arceri <tarc...@itsqueeze.com> (cherry picked from commit 31164cf5f70caa94dba0abb93610a935e17f5af2) - - - - - 229c4abd by Eric Anholt at 2019-04-22T16:06:32Z nir: Fix deref offset calculation for structs. We were calcuating the offset for the field within the struct, and just dropping it on the floor. Fixes a regression in KHR-GLES3.shaders.struct.local.nested_struct_array_dynamic_index_fragment and a few of its friends since the scratch lowering commit. Fixes: e8e159e9df40 ("nir/deref: Add helpers for getting offsets") Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net> (cherry picked from commit 9ac5ec2f90f8b6b2c0e67039b1ae7590374be872) - - - - - ac1ffeab by Lionel Landwerlin at 2019-04-22T16:06:38Z intel/devinfo: fix missing num_thread_per_eu on ICL There was an assumption that num_thread_per_eu would be set in the Gen8 features. Since this is mostly the same of all gen8->11 (except GEN9_LP that overwrites it) let's just factor it out. Signed-off-by: Lionel Landwerlin <lionel.g.landwer...@intel.com> Cc: mesa-sta...@lists.freedesktop.org Acked-by: Eric Engestrom <eric.engest...@intel.com> Reviewed-by: Anuj Phogat anuj.pho...@gmail.com (cherry picked from commit 773e6aa9fd250479e2a89b376e5eda5a1d07fc5b) - - - - - 2397f5d9 by Jason Ekstrand at 2019-04-22T16:06:44Z anv: Add a #define for the max binding table size This also fixes a bug where we mis-calculate maximum binding table sizes and may return true in vkGetDescriptorSetLayoutSupport even for sets too large to fit in a binding table. Fixes: ddc40691221 "anv: Implement VK_KHR_maintenance3" Reviewed-by: Caio Marcelo de Oliveira Filho <caio.olive...@intel.com> (cherry picked from commit a5a0dc08f18928a080e3393ebc694bc7053216fb) - - - - - b5090681 by Lubomir Rintel at 2019-04-23T16:17:51Z gallivm: guess CPU features also on ARM getHostCPUFeatures() is also available on ARM, for even longer time than for x86. Use it -- it potentially enables instructions that may speed things up. Signed-off-by: Lubomir Rintel <lkund...@v3.sk> Cc: <mesa-sta...@lists.freedesktop.org> Closes: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/518 Reviewed-by: Matt Turner <matts...@gmail.com> (cherry picked from commit bc6bfc861fd3484c4cc51f24ccb0bf64239fcfd7) - - - - - 91671ec1 by Lubomir Rintel at 2019-04-23T16:17:58Z gallivm: disable NEON instructions if they are not supported The LLVM project made some questionable decisions about defaults for armv7 (e.g. they enable NEON that is not there on NVIDIA and Marvell platforms). On top of that, getHostCPUFeatures() doesn't disable missing machine attributes. Finally, -neon alone is not sufficient to disable emmision of NEON instructions. Signed-off-by: Lubomir Rintel <lkund...@v3.sk> Cc: <mesa-sta...@lists.freedesktop.org> Reviewed-by: Matt Turner <matts...@gmail.com> (cherry picked from commit e983a975c6843c307380d7caa083eee89e02bd3c) - - - - - f223fb98 by Kenneth Graunke at 2019-04-23T16:18:20Z Revert "glsl: Set location on structure-split sampler uniform variables" This reverts commit 9e0c744f07a21fc7bb018a77cf83b057436d0d1b, which regressed dEQP-GLES2.functional.uniform_api.random.3. It turns out that the newly produced location is meaningless and impossible to consume by drivers that want to look at gl_uniform_storage, so it's probably better to leave it unset (0) than a number that looks usable. Leave a tombstone^Wcomment to discourage the next person from making the obvious looking fix. See the next commit for a longer description of the problem. This breaks tests/spec/glsl-1.10/execution/samplers/uniform-struct on i965, which was originally fixed by the revert. The next commit will fix it again. Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net> (cherry picked from commit 47303b466c1b15c9827d935c6c75e89e52b84dde) - - - - - ba1bf6c3 by Samuel Pitoiset at 2019-04-24T15:50:34Z radv: do not load vertex attributes that are not provided by the pipeline Per the Vulkan spec this is definitely invalid but X4 Foundations does that and it ends up by hanging the GPU. Found while enabling validation layers with the game. The issue will be reported to the developers. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> (cherry picked from commit 381e38aaaa47c5aa38bc4f504b325fb68b7caea8) - - - - - 44ddb884 by Marek Olšák at 2019-04-24T15:50:50Z radeonsi: use CP DMA for the null const buffer clear on CIK This is a workaround for a thread deadlock that I have no idea why it occurs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108879 Fixes: 9b331e462e5021d994859756d46cd2519d9c9c6e Acked-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> (cherry picked from commit b58e5fb6f317be771326f98d498483e45942beaf) - - - - - 5cb685a3 by Dylan Baker at 2019-04-24T17:36:18Z Bump version for 19.0.3 - - - - - c8cdee5d by Dylan Baker at 2019-04-24T17:39:04Z docs: add relnotes for 19.0.3 - - - - - 30 changed files: - VERSION - bin/install_megadrivers.py - docs/relnotes/19.0.2.html - + docs/relnotes/19.0.3.html - src/amd/common/ac_gpu_info.c - src/amd/common/ac_nir_to_llvm.c - src/amd/vulkan/radv_nir_to_llvm.c - src/amd/vulkan/radv_pipeline.c - src/amd/vulkan/radv_private.h - src/amd/vulkan/radv_shader.h - src/compiler/glsl/gl_nir_lower_samplers_as_deref.c - src/compiler/glsl/link_varyings.cpp - src/compiler/glsl_types.h - src/compiler/nir/nir_deref.c - src/compiler/nir/nir_opcodes.py - src/compiler/nir_types.h - src/gallium/auxiliary/gallivm/lp_bld_misc.cpp - src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c - src/gallium/drivers/radeonsi/si_clear.c - src/gallium/drivers/radeonsi/si_compute_blit.c - src/gallium/drivers/radeonsi/si_pipe.c - src/gallium/drivers/radeonsi/si_pipe.h - src/gallium/drivers/radeonsi/si_test_dma.c - src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c - src/gallium/winsys/virgl/drm/virgl_drm_winsys.c - src/intel/compiler/brw_vec4.cpp - src/intel/dev/gen_device_info.c - src/intel/vulkan/anv_descriptor_set.c - src/intel/vulkan/anv_device.c - src/intel/vulkan/anv_private.h The diff was not included because it is too large. View it on GitLab: https://salsa.debian.org/xorg-team/lib/mesa/compare/2964ee3ad05c4b3d1407aeaa28e2058fe93e1659...c8cdee5dc3c6f9856ee73aed2b47cee77d675022 -- View it on GitLab: https://salsa.debian.org/xorg-team/lib/mesa/compare/2964ee3ad05c4b3d1407aeaa28e2058fe93e1659...c8cdee5dc3c6f9856ee73aed2b47cee77d675022 You're receiving this email because of your account on salsa.debian.org.
